| Message ID | 20240826215933.1263453-1-scott@os.amperecomputing.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: errata: Enable the AC03_CPU_38 workaround for ampere1a | expand |
Hi D Scott, On Mon, Aug 26, 2024 at 02:59:33PM -0700, D Scott Phillips wrote: > The ampere1a cpu is affected by erratum AC04_CPU_10 which is the same > bug as AC03_CPU38. Add ampere1a to the AC03_CPU_38 workaround midr list. > > Signed-off-by: D Scott Phillips <scott@os.amperecomputing.com> > --- > Documentation/arch/arm64/silicon-errata.rst | 2 ++ > arch/arm64/Kconfig | 2 +- > arch/arm64/include/asm/cputype.h | 2 ++ > arch/arm64/kernel/cpu_errata.c | 1 + > 4 files changed, 6 insertions(+), 1 deletion(-) > > diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst > index 50327c05be8d1..39c52385f11fb 100644 > --- a/Documentation/arch/arm64/silicon-errata.rst > +++ b/Documentation/arch/arm64/silicon-errata.rst > @@ -55,6 +55,8 @@ stable kernels. > +----------------+-----------------+-----------------+-----------------------------+ > | Ampere | AmpereOne | AC03_CPU_38 | AMPERE_ERRATUM_AC03_CPU_38 | > +----------------+-----------------+-----------------+-----------------------------+ > +| Ampere | AmpereOne AC04 | AC04_CPU_10 | AMPERE_ERRATUM_AC03_CPU_38 | > ++----------------+-----------------+-----------------+-----------------------------+ We tend to stick the marketing term for a part in the second column so it is more recognizable for the user. Is this a placeholder for something different from "ampere1a"? > diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c > index f6b6b45073571..748aa536446ae 100644 > --- a/arch/arm64/kernel/cpu_errata.c > +++ b/arch/arm64/kernel/cpu_errata.c > @@ -773,6 +773,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = { > .desc = "AmpereOne erratum AC03_CPU_38", > .capability = ARM64_WORKAROUND_AMPERE_AC03_CPU_38, > ERRATA_MIDR_ALL_VERSIONS(MIDR_AMPERE1), > + ERRATA_MIDR_ALL_VERSIONS(MIDR_AMPERE1A), This will break the workaround on AC03, since the second macro reassigns ::midr_range. You'll want to use ERRATA_MIDR_RANGE_LIST() instead w/ an array of affected MIDRs.
Also, +cc Marc + the rest of the KVM folks. checkpatch doesn't help in this situation, but it'd be good to keep everyone in the loop since this is an erratum that affects KVM. On Mon, Aug 26, 2024 at 04:24:00PM -0700, Oliver Upton wrote: > Hi D Scott, > > On Mon, Aug 26, 2024 at 02:59:33PM -0700, D Scott Phillips wrote: > > The ampere1a cpu is affected by erratum AC04_CPU_10 which is the same > > bug as AC03_CPU38. Add ampere1a to the AC03_CPU_38 workaround midr list. > > > > Signed-off-by: D Scott Phillips <scott@os.amperecomputing.com> > > --- > > Documentation/arch/arm64/silicon-errata.rst | 2 ++ > > arch/arm64/Kconfig | 2 +- > > arch/arm64/include/asm/cputype.h | 2 ++ > > arch/arm64/kernel/cpu_errata.c | 1 + > > 4 files changed, 6 insertions(+), 1 deletion(-) > > > > diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst > > index 50327c05be8d1..39c52385f11fb 100644 > > --- a/Documentation/arch/arm64/silicon-errata.rst > > +++ b/Documentation/arch/arm64/silicon-errata.rst > > @@ -55,6 +55,8 @@ stable kernels. > > +----------------+-----------------+-----------------+-----------------------------+ > > | Ampere | AmpereOne | AC03_CPU_38 | AMPERE_ERRATUM_AC03_CPU_38 | > > +----------------+-----------------+-----------------+-----------------------------+ > > +| Ampere | AmpereOne AC04 | AC04_CPU_10 | AMPERE_ERRATUM_AC03_CPU_38 | > > ++----------------+-----------------+-----------------+-----------------------------+ > > We tend to stick the marketing term for a part in the second column so > it is more recognizable for the user. Is this a placeholder for something > different from "ampere1a"? > > > diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c > > index f6b6b45073571..748aa536446ae 100644 > > --- a/arch/arm64/kernel/cpu_errata.c > > +++ b/arch/arm64/kernel/cpu_errata.c > > @@ -773,6 +773,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = { > > .desc = "AmpereOne erratum AC03_CPU_38", > > .capability = ARM64_WORKAROUND_AMPERE_AC03_CPU_38, > > ERRATA_MIDR_ALL_VERSIONS(MIDR_AMPERE1), > > + ERRATA_MIDR_ALL_VERSIONS(MIDR_AMPERE1A), > > This will break the workaround on AC03, since the second macro reassigns > ::midr_range. > > You'll want to use ERRATA_MIDR_RANGE_LIST() instead w/ an array of > affected MIDRs. > > -- > Thanks, > Oliver
On 8/27/24 04:53, Oliver Upton wrote: > Hi D Scott, > > On Mon, Aug 26, 2024 at 02:59:33PM -0700, D Scott Phillips wrote: >> The ampere1a cpu is affected by erratum AC04_CPU_10 which is the same >> bug as AC03_CPU38. Add ampere1a to the AC03_CPU_38 workaround midr list. >> >> Signed-off-by: D Scott Phillips <scott@os.amperecomputing.com> >> --- >> Documentation/arch/arm64/silicon-errata.rst | 2 ++ >> arch/arm64/Kconfig | 2 +- >> arch/arm64/include/asm/cputype.h | 2 ++ >> arch/arm64/kernel/cpu_errata.c | 1 + >> 4 files changed, 6 insertions(+), 1 deletion(-) >> >> diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst >> index 50327c05be8d1..39c52385f11fb 100644 >> --- a/Documentation/arch/arm64/silicon-errata.rst >> +++ b/Documentation/arch/arm64/silicon-errata.rst >> @@ -55,6 +55,8 @@ stable kernels. >> +----------------+-----------------+-----------------+-----------------------------+ >> | Ampere | AmpereOne | AC03_CPU_38 | AMPERE_ERRATUM_AC03_CPU_38 | >> +----------------+-----------------+-----------------+-----------------------------+ >> +| Ampere | AmpereOne AC04 | AC04_CPU_10 | AMPERE_ERRATUM_AC03_CPU_38 | >> ++----------------+-----------------+-----------------+-----------------------------+ > > We tend to stick the marketing term for a part in the second column so > it is more recognizable for the user. Is this a placeholder for something > different from "ampere1a"? Agreed, even the MIDR being added here is for AMPERE1A. Probably something like 'AmpereOneA' might be more suitable. > >> diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c >> index f6b6b45073571..748aa536446ae 100644 >> --- a/arch/arm64/kernel/cpu_errata.c >> +++ b/arch/arm64/kernel/cpu_errata.c >> @@ -773,6 +773,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = { >> .desc = "AmpereOne erratum AC03_CPU_38", >> .capability = ARM64_WORKAROUND_AMPERE_AC03_CPU_38, >> ERRATA_MIDR_ALL_VERSIONS(MIDR_AMPERE1), >> + ERRATA_MIDR_ALL_VERSIONS(MIDR_AMPERE1A), > > This will break the workaround on AC03, since the second macro reassigns > ::midr_range. > > You'll want to use ERRATA_MIDR_RANGE_LIST() instead w/ an array of > affected MIDRs. > +1 Although ERRATA_MIDR_RANGE_LIST() in turn creates such a list.
Anshuman Khandual <anshuman.khandual@arm.com> writes: > On 8/27/24 04:53, Oliver Upton wrote: >> Hi D Scott, >> >> On Mon, Aug 26, 2024 at 02:59:33PM -0700, D Scott Phillips wrote: >>> The ampere1a cpu is affected by erratum AC04_CPU_10 which is the same >>> bug as AC03_CPU38. Add ampere1a to the AC03_CPU_38 workaround midr list. >>> >>> Signed-off-by: D Scott Phillips <scott@os.amperecomputing.com> >>> --- >>> Documentation/arch/arm64/silicon-errata.rst | 2 ++ >>> arch/arm64/Kconfig | 2 +- >>> arch/arm64/include/asm/cputype.h | 2 ++ >>> arch/arm64/kernel/cpu_errata.c | 1 + >>> 4 files changed, 6 insertions(+), 1 deletion(-) >>> >>> diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst >>> index 50327c05be8d1..39c52385f11fb 100644 >>> --- a/Documentation/arch/arm64/silicon-errata.rst >>> +++ b/Documentation/arch/arm64/silicon-errata.rst >>> @@ -55,6 +55,8 @@ stable kernels. >>> +----------------+-----------------+-----------------+-----------------------------+ >>> | Ampere | AmpereOne | AC03_CPU_38 | AMPERE_ERRATUM_AC03_CPU_38 | >>> +----------------+-----------------+-----------------+-----------------------------+ >>> +| Ampere | AmpereOne AC04 | AC04_CPU_10 | AMPERE_ERRATUM_AC03_CPU_38 | >>> ++----------------+-----------------+-----------------+-----------------------------+ >> >> We tend to stick the marketing term for a part in the second column so >> it is more recognizable for the user. Is this a placeholder for something >> different from "ampere1a"? > > Agreed, even the MIDR being added here is for AMPERE1A. Probably something > like 'AmpereOneA' might be more suitable. "AmpereOne AC04" was given to me by our marketing department, so that should be the user visible name of the part when they buy/use it. ampere1a is the name of the core in the SoC and the thing you can use in gcc's --mtune=, similar to "neoverse-n1" within "Ampere Altra". >> >>> diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c >>> index f6b6b45073571..748aa536446ae 100644 >>> --- a/arch/arm64/kernel/cpu_errata.c >>> +++ b/arch/arm64/kernel/cpu_errata.c >>> @@ -773,6 +773,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = { >>> .desc = "AmpereOne erratum AC03_CPU_38", >>> .capability = ARM64_WORKAROUND_AMPERE_AC03_CPU_38, >>> ERRATA_MIDR_ALL_VERSIONS(MIDR_AMPERE1), >>> + ERRATA_MIDR_ALL_VERSIONS(MIDR_AMPERE1A), >> >> This will break the workaround on AC03, since the second macro reassigns >> ::midr_range. >> >> You'll want to use ERRATA_MIDR_RANGE_LIST() instead w/ an array of >> affected MIDRs. >> > > +1 > > Although ERRATA_MIDR_RANGE_LIST() in turn creates such a list. Oops, my mistake. I'll fix this.
diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst index 50327c05be8d1..39c52385f11fb 100644 --- a/Documentation/arch/arm64/silicon-errata.rst +++ b/Documentation/arch/arm64/silicon-errata.rst @@ -55,6 +55,8 @@ stable kernels. +----------------+-----------------+-----------------+-----------------------------+ | Ampere | AmpereOne | AC03_CPU_38 | AMPERE_ERRATUM_AC03_CPU_38 | +----------------+-----------------+-----------------+-----------------------------+ +| Ampere | AmpereOne AC04 | AC04_CPU_10 | AMPERE_ERRATUM_AC03_CPU_38 | ++----------------+-----------------+-----------------+-----------------------------+ +----------------+-----------------+-----------------+-----------------------------+ | ARM | Cortex-A510 | #2457168 | ARM64_ERRATUM_2457168 | +----------------+-----------------+-----------------+-----------------------------+ diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index a2f8ff354ca67..c8cba20a4d11b 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -423,7 +423,7 @@ config AMPERE_ERRATUM_AC03_CPU_38 default y help This option adds an alternative code sequence to work around Ampere - erratum AC03_CPU_38 on AmpereOne. + errata AC03_CPU_38 and AC04_CPU_10 on AmpereOne. The affected design reports FEAT_HAFDBS as not implemented in ID_AA64MMFR1_EL1.HAFDBS, but (V)TCR_ELx.{HA,HD} are not RES0 diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 5fd7caea44193..5a7dfeb8e8eb5 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -143,6 +143,7 @@ #define APPLE_CPU_PART_M2_AVALANCHE_MAX 0x039 #define AMPERE_CPU_PART_AMPERE1 0xAC3 +#define AMPERE_CPU_PART_AMPERE1A 0xAC4 #define MICROSOFT_CPU_PART_AZURE_COBALT_100 0xD49 /* Based on r0p0 of ARM Neoverse N2 */ @@ -212,6 +213,7 @@ #define MIDR_APPLE_M2_BLIZZARD_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD_MAX) #define MIDR_APPLE_M2_AVALANCHE_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE_MAX) #define MIDR_AMPERE1 MIDR_CPU_MODEL(ARM_CPU_IMP_AMPERE, AMPERE_CPU_PART_AMPERE1) +#define MIDR_AMPERE1A MIDR_CPU_MODEL(ARM_CPU_IMP_AMPERE, AMPERE_CPU_PART_AMPERE1A) #define MIDR_MICROSOFT_AZURE_COBALT_100 MIDR_CPU_MODEL(ARM_CPU_IMP_MICROSOFT, MICROSOFT_CPU_PART_AZURE_COBALT_100) /* Fujitsu Erratum 010001 affects A64FX 1.0 and 1.1, (v0r0 and v1r0) */ diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index f6b6b45073571..748aa536446ae 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -773,6 +773,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = { .desc = "AmpereOne erratum AC03_CPU_38", .capability = ARM64_WORKAROUND_AMPERE_AC03_CPU_38, ERRATA_MIDR_ALL_VERSIONS(MIDR_AMPERE1), + ERRATA_MIDR_ALL_VERSIONS(MIDR_AMPERE1A), }, #endif {
The ampere1a cpu is affected by erratum AC04_CPU_10 which is the same bug as AC03_CPU38. Add ampere1a to the AC03_CPU_38 workaround midr list. Signed-off-by: D Scott Phillips <scott@os.amperecomputing.com> --- Documentation/arch/arm64/silicon-errata.rst | 2 ++ arch/arm64/Kconfig | 2 +- arch/arm64/include/asm/cputype.h | 2 ++ arch/arm64/kernel/cpu_errata.c | 1 + 4 files changed, 6 insertions(+), 1 deletion(-)