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s=dkimrelay; t=1724783094; bh=1e7cJvrOimTp0/ijOBAcUos/8l8iChyToknCyUUuYrA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SuQKo+BSGey1v+Xbvh6OgFnX6mlBrwyWAHjqHXm5GhfgxZOe2WD2SH3FgaJndvlgX K5aPELc0DVKmksaNACC6Sdn4kK9mxTcR8K3e7ESlk868tnC7C/Q88U1l9/hkpiRfEr +nySpvzEDvoWUGnmcCntbFca79CCsMMdMW/D+wEs= Received: from stbirv-lnx-1.igp.broadcom.net (stbirv-lnx-1.igp.broadcom.net [10.67.48.32]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail-lvn-it-01.lvn.broadcom.net (Postfix) with ESMTPSA id 07E7918045EB5C; Tue, 27 Aug 2024 11:24:54 -0700 (PDT) From: Florian Fainelli To: linux-arm-kernel@lists.infradead.org Cc: Florian Fainelli , Krzysztof Kozlowski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sudeep Holla , Cristian Marussi , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list), arm-scmi@vger.kernel.org (open list:SYSTEM CONTROL & POWER/MANAGEMENT INTERFACE), justin.chen@broadcom.com, opendmb@gmail.com, kapil.hali@broadcom.com, bcm-kernel-feedback-list@broadcom.com, Arnd Bergmann Subject: [PATCH v4 1/2] dt-bindings: sram: Document reg-io-width property Date: Tue, 27 Aug 2024 11:24:49 -0700 Message-Id: <20240827182450.3608307-2-florian.fainelli@broadcom.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240827182450.3608307-1-florian.fainelli@broadcom.com> References: <20240827182450.3608307-1-florian.fainelli@broadcom.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240827_192458_991416_59DBE5CD X-CRM114-Status: GOOD ( 11.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Some SRAMs need to be accessed with a specific access width, define the 'reg-io-width' property specifying such access sizes. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Florian Fainelli --- Documentation/devicetree/bindings/sram/sram.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml index 0922d1f71ba8..7c1337e159f2 100644 --- a/Documentation/devicetree/bindings/sram/sram.yaml +++ b/Documentation/devicetree/bindings/sram/sram.yaml @@ -101,6 +101,12 @@ patternProperties: IO mem address range, relative to the SRAM range. maxItems: 1 + reg-io-width: + description: + The size (in bytes) of the IO accesses that should be performed on the + SRAM. + enum: [1, 2, 4, 8] + pool: description: Indicates that the particular reserved SRAM area is addressable