Message ID | 20240829-arm64-gcs-v12-7-42fec947436a@kernel.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show
Return-Path: <linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org> X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C8496C7114C for <linux-arm-kernel@archiver.kernel.org>; Wed, 28 Aug 2024 23:36:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=t91UGAePWHVzNXHj3HuHAmZ3HW2R994gyYa2H/IzQqw=; b=DJyrfvfLNiDI5gFNiqoyImrZLr pkvCKAMC+DBDKNXTXJC1ZuAjw2TfHsUhznj4qcLWJlZhZ903g8gl5Oh0AjZRY3C3iORM01PA5O8Bs ZKt+UHNhKf18m3HbStT/HoOcDGeNxfl0CNOqT7Hk9/onX7mz6rwe0Lu3IrVvXUtl0TIHwEYkMg6fY rlP5v6h7OcrX5p1Nc61SLFwPAnW+tWF2Yc0ARYz2kd+8aBfa80rL2cxHaDuw2Xk5JwC5d8lFLb+em G7HuTZK2h5hZxL9KDhiwxh5keS9tjNK/5ISmtaIy5rLkcZzxI6BkzkNY8TMR7kEbxc6F3/zh/5lbL 3yb3FwtA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sjSCx-0000000HP9N-1MrY; Wed, 28 Aug 2024 23:36:11 +0000 Received: from nyc.source.kernel.org ([2604:1380:45d1:ec00::3]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sjS6N-0000000HLzH-48VX; Wed, 28 Aug 2024 23:29:25 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id 0EB1BA4375E; Wed, 28 Aug 2024 23:29:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DB798C4CEC9; Wed, 28 Aug 2024 23:29:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1724887762; bh=4p/cwsbgBUzYKsL2fclAIfpUU9Y3uPXu2QlRekLj7SY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=kNcQU5nyrsMetOTGFm6ud7UHZ/GnC48WWUDtMXTgWHntNfYUFLWWUbL9x2wYmUDTy x7lAq0JvS+9YS0FzCoPtxTbjpqy3dltQDe4nreFRosly12F+4B+Wb+N0OvQBsE8bQD UcMJcKi5VwuSPfz3VnTbOn6GfEtR23FPaLmt68TzAf1gDpvvAlmr0hc4FoH6g6T8LM dmi7fEHFLFgHQ/wd35qLqQxoyt33lXfh+qz2JE53etAKJK1fN/NYH0a+3sQkBQIbTb jVUc8RtgEhHBH+qzQiPpSMaOsGUxLEcwHNhLcC9cIUgM3x1hBKYNObyRW8qXnPl/7y jk9bBXyYZiSHQ== From: Mark Brown <broonie@kernel.org> Date: Thu, 29 Aug 2024 00:27:23 +0100 Subject: [PATCH v12 07/39] arm64/sysreg: Add definitions for architected GCS caps MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240829-arm64-gcs-v12-7-42fec947436a@kernel.org> References: <20240829-arm64-gcs-v12-0-42fec947436a@kernel.org> In-Reply-To: <20240829-arm64-gcs-v12-0-42fec947436a@kernel.org> To: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, Jonathan Corbet <corbet@lwn.net>, Andrew Morton <akpm@linux-foundation.org>, Marc Zyngier <maz@kernel.org>, Oliver Upton <oliver.upton@linux.dev>, James Morse <james.morse@arm.com>, Suzuki K Poulose <suzuki.poulose@arm.com>, Arnd Bergmann <arnd@arndb.de>, Oleg Nesterov <oleg@redhat.com>, Eric Biederman <ebiederm@xmission.com>, Shuah Khan <shuah@kernel.org>, "Rick P. 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Series |
arm64/gcs: Provide support for GCS in userspace
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expand
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diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 4a9ea103817e..b8d8718a7b8b 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -1077,6 +1077,26 @@ #define POE_RXW UL(0x7) #define POE_MASK UL(0xf) +/* + * Definitions for Guarded Control Stack + */ + +#define GCS_CAP_ADDR_MASK GENMASK(63, 12) +#define GCS_CAP_ADDR_SHIFT 12 +#define GCS_CAP_ADDR_WIDTH 52 +#define GCS_CAP_ADDR(x) FIELD_GET(GCS_CAP_ADDR_MASK, x) + +#define GCS_CAP_TOKEN_MASK GENMASK(11, 0) +#define GCS_CAP_TOKEN_SHIFT 0 +#define GCS_CAP_TOKEN_WIDTH 12 +#define GCS_CAP_TOKEN(x) FIELD_GET(GCS_CAP_TOKEN_MASK, x) + +#define GCS_CAP_VALID_TOKEN 0x1 +#define GCS_CAP_IN_PROGRESS_TOKEN 0x5 + +#define GCS_CAP(x) ((((unsigned long)x) & GCS_CAP_ADDR_MASK) | \ + GCS_CAP_VALID_TOKEN) + #define ARM64_FEATURE_FIELD_BITS 4 /* Defined for compatibility only, do not add new users. */