From patchwork Tue Sep 3 08:31:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaishnav Achath X-Patchwork-Id: 13788268 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 519A5CD343A for ; Tue, 3 Sep 2024 08:33:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=r/ew5NOkndZuuSGNjvFeQtkZxHPlPPdvrvcAeP2sPk0=; b=Mpeu4t7wqDnzlWH/tOXU8FWFfS ESxjOvI/teOsW+YGef5SB7v2xiII6v3uANjC1AAHAdSO65tyTbXQuIzz7g0q2pxzSs8K22nwj3pBX WmiPb9jBO5mt4zn8T1KCNkB/ryAS8xHQfJFu6Uwf5ZCmLtEBX8W1UsMvIHzvsUT4QGi0so1oelxIE 7mrBObp5Xc2fENAVAJYFClvIRxf56Wmn2D61hAaFSHllgcky0pWIPdRN/Qs6oStIADluyte7kiK6B OLhrIpnKiLo0q19bxnTuuSf7EtgnQriCTJa0A0mUEvSBQ8r0G/fEcjs4KGUHpHicotXm7JczXjm0P RS/aLa/Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1slOyU-0000000GvAs-45QO; Tue, 03 Sep 2024 08:33:19 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1slOwh-0000000Gujn-2kzO for linux-arm-kernel@lists.infradead.org; Tue, 03 Sep 2024 08:31:29 +0000 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 4838VFVq012845; Tue, 3 Sep 2024 03:31:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1725352275; bh=r/ew5NOkndZuuSGNjvFeQtkZxHPlPPdvrvcAeP2sPk0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=iyxhHipF1DQ0ReaLJvbtU/7qwSw1BGXTTuacfNUnJrpm8Si0ASDZJfq/51w450eSx wbeyOfcEo531rhHlj4Q33fr0avviu8QKc3jIg3pcgtgZH0XgAKuxhuUdQs5o7eReEc u01Mo1iOYwinUPkEQ5WV/Rfaixeh5k3slOc42YH0= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 4838VFgC017237 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 3 Sep 2024 03:31:15 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 3 Sep 2024 03:31:15 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 3 Sep 2024 03:31:15 -0500 Received: from uda0490681.. ([10.24.69.142]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4838V7kV085647; Tue, 3 Sep 2024 03:31:12 -0500 From: Vaishnav Achath To: , , , , , , CC: , , , , , Subject: [RFC DONOTMERGE PATCH 1/1] arm64: dts: ti: k3-am62p-main: Add interrupts property for DMSS INTA Date: Tue, 3 Sep 2024 14:01:07 +0530 Message-ID: <20240903083107.3562816-2-vaishnav.a@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240903083107.3562816-1-vaishnav.a@ti.com> References: <20240903083107.3562816-1-vaishnav.a@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240903_013127_808786_BABAF407 X-CRM114-Status: GOOD ( 11.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The interrupt aggregator in DMSS for TI K3 devices currently uses a custom vendor property "ti,interrupt-ranges" to specify the interrupt source to parent mapping. As per interrupt controller bindings [1], it is mandatory for Nodes that describe devices which generate interrupts to contain an "interrupts" property, an "interrupts-extended" property, or both. Add interrupts property to the Interrupt aggregator node so that the mapping is specified in a standard manner. 1 - https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt Signed-off-by: Vaishnav Achath --- DONOTMERGE - while adding the interrupts property helps to conform to the bindings, it is difficult to maintain the long list and this is not the only platform affected, if this is the direction to fix it, I will fix for all K3 platforms together, more details on RFC in cover letter. arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 35 +++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi index 420c77c8e9e5..0c7912d177fe 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi @@ -40,6 +40,41 @@ &oc_sram { &inta_main_dmss { ti,interrupt-ranges = <5 69 35>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; }; &main_pmx0 {