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AJvYcCXllEeBRuQOTDXBwD6wSuoOqH99UTmY6oH6f7K5QNI+1h2fPRIhp2xVYq6VoHxDcJNZWVZSPcd9ZRC2f354EuZw@lists.infradead.org X-Gm-Message-State: AOJu0Yy2dLoR0Qww9EfdiQrTRIETx2nxA14UkTrudh122fxjQON+rKpy btEwLH4nmPIAOjP8ipzjAwLjVLuzbOefSyStvNdwV8sznBpG/huHUUnPZz/H6Lk= X-Google-Smtp-Source: AGHT+IG/0epOuRWCHiAJ1l6a7W+fQwq6asFnurcKDboZ9mI63Fa4LwFeUnVbm8GzqO8eC/s+nQeayA== X-Received: by 2002:a05:600c:444c:b0:427:ff3b:7a20 with SMTP id 5b1f17b1804b1-42bb27a9c9dmr134456525e9.27.1725358887488; Tue, 03 Sep 2024 03:21:27 -0700 (PDT) Received: from localhost.localdomain ([89.47.253.130]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42bb6e274ccsm168739995e9.37.2024.09.03.03.21.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Sep 2024 03:21:27 -0700 (PDT) From: James Clark To: irogers@google.com, linux-perf-users@vger.kernel.org, kan.liang@linux.intel.com, ak@linux.intel.com, namhyung@kernel.org Cc: James Clark , John Garry , Will Deacon , Mike Leach , Leo Yan , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Adrian Hunter , Weilin Wang , Dominique Martinet , Colin Ian King , Athira Rajeev , Yang Jihong , Howard Chu , Ze Gao , Jing Zhang , Sun Haiyong , Yicong Yang , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 4/7] perf evsel x86: Make evsel__has_perf_metrics work for legacy events Date: Tue, 3 Sep 2024 11:19:48 +0100 Message-Id: <20240903102005.78049-5-james.clark@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240903102005.78049-1-james.clark@linaro.org> References: <20240903102005.78049-1-james.clark@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240903_032129_583961_92AD8134 X-CRM114-Status: GOOD ( 20.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ian Rogers Use PMU interface to better detect core PMU for legacy events. Look for slots event on core PMU if it is appropriate for the event. Signed-off-by: Ian Rogers Signed-off-by: James Clark --- tools/perf/arch/x86/util/evsel.c | 31 ++++++++++++++++++++++++++----- 1 file changed, 26 insertions(+), 5 deletions(-) diff --git a/tools/perf/arch/x86/util/evsel.c b/tools/perf/arch/x86/util/evsel.c index 090d0f371891..1eaae8819c5e 100644 --- a/tools/perf/arch/x86/util/evsel.c +++ b/tools/perf/arch/x86/util/evsel.c @@ -21,7 +21,8 @@ void arch_evsel__set_sample_weight(struct evsel *evsel) /* Check whether the evsel's PMU supports the perf metrics */ bool evsel__sys_has_perf_metrics(const struct evsel *evsel) { - const char *pmu_name = evsel->pmu_name ? evsel->pmu_name : "cpu"; + struct perf_pmu *pmu; + u32 type = evsel->core.attr.type; /* * The PERF_TYPE_RAW type is the core PMU type, e.g., "cpu" PMU @@ -31,11 +32,31 @@ bool evsel__sys_has_perf_metrics(const struct evsel *evsel) * Checking both the PERF_TYPE_RAW type and the slots event * should be good enough to detect the perf metrics feature. */ - if ((evsel->core.attr.type == PERF_TYPE_RAW) && - perf_pmus__have_event(pmu_name, "slots")) - return true; +again: + switch (type) { + case PERF_TYPE_HARDWARE: + case PERF_TYPE_HW_CACHE: + type = evsel->core.attr.config >> PERF_PMU_TYPE_SHIFT; + if (type) + goto again; + break; + case PERF_TYPE_RAW: + break; + default: + return false; + } + + pmu = evsel->pmu; + if (pmu == &perf_pmu__fake) + pmu = NULL; - return false; + if (!pmu) { + while ((pmu = perf_pmus__scan_core(pmu)) != NULL) { + if (pmu->type == PERF_TYPE_RAW) + break; + } + } + return pmu && perf_pmu__have_event(pmu, "slots"); } bool arch_evsel__must_be_in_group(const struct evsel *evsel)