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AJvYcCUavUgzOZtKsH/I+0avbkgtjNY/A6cT0jRX5etcB0ZRGOkwlsJfckNlm4qzdg7mcL4QJOBTsxVCe5HYqKfWQpg7@lists.infradead.org X-Gm-Message-State: AOJu0YwlyC6ZqTz+S3gw4L1H8DdlXO1ITuxawlPFGvZx5FYGKPHnRpFm iCVff+S2E2vW3rJNsQ8FI2Nhc//fh8piRpqvR+hfVmky98p9mWBh X-Google-Smtp-Source: AGHT+IEiYcVnzzd9XCs6BnPdnES4UAw5UPqZt8FYQLjQr9Z+xwCq74AYcx8uxESiYvlFIj/3jd88nA== X-Received: by 2002:a05:6808:301e:b0:3d9:222e:40ac with SMTP id 5614622812f47-3e02a02eebemr6979195b6e.44.1725782378990; Sun, 08 Sep 2024 00:59:38 -0700 (PDT) Received: from localhost.localdomain ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id 41be03b00d2f7-7d8255dc1c6sm2012690a12.68.2024.09.08.00.59.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Sep 2024 00:59:38 -0700 (PDT) From: Nick Chan To: Krzysztof Kozlowski , Alim Akhtar , Greg Kroah-Hartman , Jiri Slaby , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Cc: asahi@lists.linux.dev, Nick Chan Subject: [PATCH 2/3] tty: serial: samsung: Fix A7-A11 serial earlycon SError Date: Sun, 8 Sep 2024 15:50:49 +0800 Message-ID: <20240908075904.12133-3-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240908075904.12133-1-towinchenmi@gmail.com> References: <20240908075904.12133-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240908_005940_260466_E9DA4B47 X-CRM114-Status: GOOD ( 17.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Apple's earlier SoCs, like A7-A11, requires 32-bit writes for the serial port. Otherwise, a SError happens when writing to UTXH (+0x20). This only manifested in earlycon as reg-io-width in the device tree is consulted for normal serial writes. Change the iotype of the port to UPIO_MEM32, to allow the serial port to function on A7-A11 SoCs. This change does not appear to affect Apple M1 and above. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Nick Chan --- drivers/tty/serial/samsung_tty.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c index c4f2ac9518aa..7574d4176e76 100644 --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c @@ -2536,7 +2536,7 @@ static const struct s3c24xx_serial_drv_data s5l_serial_drv_data = { .name = "Apple S5L UART", .type = TYPE_APPLE_S5L, .port_type = PORT_8250, - .iotype = UPIO_MEM, + .iotype = UPIO_MEM32, .fifosize = 16, .rx_fifomask = S3C2410_UFSTAT_RXMASK, .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT, @@ -2822,6 +2822,9 @@ OF_EARLYCON_DECLARE(gs101, "google,gs101-uart", gs101_early_console_setup); static int __init apple_s5l_early_console_setup(struct earlycon_device *device, const char *opt) { + /* Apple A7-A11 requires MMIO32 register accesses. */ + device->port.iotype = UPIO_MEM32; + /* Close enough to S3C2410 for earlycon... */ device->port.private_data = &s3c2410_early_console_data;