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AJvYcCWYAtmY1XCQ7aua5pEike4l7Mc1IcUExrsE9Jt3ZEntcYakzuKm5vjqDq1QKVp36izZlfoGcCxB40A4z5bNm/Qu@lists.infradead.org X-Gm-Message-State: AOJu0YzFxH827jhRgVswFpO44MRKwM8mR56Azumy6yAjqOKNO8PpSroX UX9sk23GDguUMingWvHW0ajbHR83nQQxPwJ/fqmbK4ZDeS4oXI/PJW3WTOULBg== X-Google-Smtp-Source: AGHT+IECm7bSQDC8ZsxIXjMTAElbncL0v7wsrCPb3dyLQVmVYtqmVb6fO9ZMVHxPt6utNaXN13eKCw== X-Received: by 2002:a05:6a20:cd0e:b0:1cf:50e6:fee4 with SMTP id adf61e73a8af0-1cf5e19f82fmr5867984637.49.1726051941085; Wed, 11 Sep 2024 03:52:21 -0700 (PDT) Received: from fshao-p620.tpe.corp.google.com ([2401:fa00:1:10:102f:d738:6069:fd4b]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-7d8242b3d13sm7147352a12.52.2024.09.11.03.52.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Sep 2024 03:52:20 -0700 (PDT) From: Fei Shao To: AngeloGioacchino Del Regno , Matthias Brugger Cc: Fei Shao , Conor Dooley , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 7/8] arm64: dts: mediatek: mt8188: Add audio support Date: Wed, 11 Sep 2024 18:51:12 +0800 Message-ID: <20240911105131.4094027-8-fshao@chromium.org> X-Mailer: git-send-email 2.46.0.598.g6f2099f65c-goog In-Reply-To: <20240911105131.4094027-1-fshao@chromium.org> References: <20240911105131.4094027-1-fshao@chromium.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240911_035222_076068_0016BA93 X-CRM114-Status: GOOD ( 12.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add following nodes to support audio enablement on MT8188 SoC: - sound card - audio controller (AFE) - audio DSP and its associated mailboxes Signed-off-by: Fei Shao --- Changes in v2: - Replace hardcoded AFE reset ID with correct definition arch/arm64/boot/dts/mediatek/mt8188.dtsi | 96 ++++++++++++++++++++++++ 1 file changed, 96 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi index 32e5b7108f6a..f459e86d4024 100644 --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi @@ -429,6 +429,11 @@ psci { method = "smc"; }; + sound: sound { + mediatek,platform = <&afe>; + status = "disabled"; + }; + thermal_zones: thermal-zones { cpu-little0-thermal { polling-delay = <1000>; @@ -1349,6 +1354,97 @@ scp: scp@10500000 { interrupts = ; }; + afe: audio-controller@10b10000 { + compatible = "mediatek,mt8188-afe"; + reg = <0 0x10b10000 0 0x10000>; + assigned-clocks = <&topckgen CLK_TOP_A1SYS_HP>; + assigned-clock-parents = <&clk26m>; + clocks = <&clk26m>, + <&apmixedsys CLK_APMIXED_APLL1>, + <&apmixedsys CLK_APMIXED_APLL2>, + <&topckgen CLK_TOP_APLL12_CK_DIV0>, + <&topckgen CLK_TOP_APLL12_CK_DIV1>, + <&topckgen CLK_TOP_APLL12_CK_DIV2>, + <&topckgen CLK_TOP_APLL12_CK_DIV3>, + <&topckgen CLK_TOP_APLL12_CK_DIV9>, + <&topckgen CLK_TOP_A1SYS_HP>, + <&topckgen CLK_TOP_AUD_INTBUS>, + <&topckgen CLK_TOP_AUDIO_H>, + <&topckgen CLK_TOP_AUDIO_LOCAL_BUS>, + <&topckgen CLK_TOP_DPTX>, + <&topckgen CLK_TOP_I2SO1>, + <&topckgen CLK_TOP_I2SO2>, + <&topckgen CLK_TOP_I2SI1>, + <&topckgen CLK_TOP_I2SI2>, + <&adsp_audio26m CLK_AUDIODSP_AUDIO26M>, + <&topckgen CLK_TOP_APLL1_D4>, + <&topckgen CLK_TOP_APLL2_D4>, + <&topckgen CLK_TOP_APLL12_CK_DIV4>, + <&topckgen CLK_TOP_A2SYS>, + <&topckgen CLK_TOP_AUD_IEC>; + clock-names = "clk26m", + "apll1", + "apll2", + "apll12_div0", + "apll12_div1", + "apll12_div2", + "apll12_div3", + "apll12_div9", + "top_a1sys_hp", + "top_aud_intbus", + "top_audio_h", + "top_audio_local_bus", + "top_dptx", + "top_i2so1", + "top_i2so2", + "top_i2si1", + "top_i2si2", + "adsp_audio_26m", + "apll1_d4", + "apll2_d4", + "apll12_div4", + "top_a2sys", + "top_aud_iec"; + interrupts = ; + power-domains = <&spm MT8188_POWER_DOMAIN_AUDIO>; + resets = <&watchdog MT8188_TOPRGU_AUDIO_SW_RST>; + reset-names = "audiosys"; + mediatek,infracfg = <&infracfg_ao>; + mediatek,topckgen = <&topckgen>; + status = "disabled"; + }; + + adsp: adsp@10b80000 { + compatible = "mediatek,mt8188-dsp"; + reg = <0 0x10b80000 0 0x2000>, + <0 0x10d00000 0 0x80000>, + <0 0x10b8b000 0 0x100>, + <0 0x10b8f000 0 0x1000>; + reg-names = "cfg", "sram", "sec", "bus"; + assigned-clocks = <&topckgen CLK_TOP_ADSP>; + clocks = <&topckgen CLK_TOP_ADSP>, + <&topckgen CLK_TOP_AUDIO_LOCAL_BUS>; + clock-names = "audiodsp", "adsp_bus"; + mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>; + mbox-names = "rx", "tx"; + power-domains = <&spm MT8188_POWER_DOMAIN_ADSP>; + status = "disabled"; + }; + + adsp_mailbox0: mailbox@10b86000 { + compatible = "mediatek,mt8188-adsp-mbox", "mediatek,mt8186-adsp-mbox"; + reg = <0 0x10b86100 0 0x1000>; + interrupts = ; + #mbox-cells = <0>; + }; + + adsp_mailbox1: mailbox@10b87000 { + compatible = "mediatek,mt8188-adsp-mbox", "mediatek,mt8186-adsp-mbox"; + reg = <0 0x10b87100 0 0x1000>; + interrupts = ; + #mbox-cells = <0>; + }; + adsp_audio26m: clock-controller@10b91100 { compatible = "mediatek,mt8188-adsp-audio26m"; reg = <0 0x10b91100 0 0x100>;