From patchwork Thu Sep 12 09:33:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrei Simion X-Patchwork-Id: 13801818 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EA036EEB57C for ; Thu, 12 Sep 2024 09:34:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=X+keIiHO55F/YG5Kc3Dtx68YsXNwWWuObUgQXYA1p2k=; b=H0A3ugKHLe895MTPJJW/eS+gFO ZSsH1wKnVZFRdaH2a6RDUm3whBplTFNmAZXWnRCmdmYcji7K7t6/KnRS1trFHsf01zdqk11OKHGZN QdjXxmAtv5orGEXnrZ7+X3ORItRAp1WZwlagblHQE2JjSYqV3OXA9Z8oJY0045BJYwgoQaOMBYJB7 EKrFg63+HF2E/RxyPJhUmM56P2qrSXrjoxlqMWhVUnWfVd/a179D9Zn1YWIaXE5IOcArIqymFOTmz cGQ4VDpiaxHyn6GYViRbwukiksuqmaivwgoSKw0TFyX3SR9fFVm65uETPCjtGxABjHEbL0yUNgttW mq+IKGCA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sogDb-0000000CYRE-09Ng; Thu, 12 Sep 2024 09:34:27 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sogCW-0000000CYB1-0IC3 for linux-arm-kernel@lists.infradead.org; Thu, 12 Sep 2024 09:33:21 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1726133600; x=1757669600; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=x9MZ4i7i6o6MmiE6TuNgzQILdZZGvsilrySuI6sanyE=; b=Ue2HDWMMMtb6pN0oEmDvicGultLOgNND+tp6AzkZ3gHnjoonpOVJDUKn 5ES9zrvQLvGvKdJQZfdFJYh4dVTijG1dOu/UNdfV8KuN4pBGaD50aR4y9 K6PCfzHgq52/Z0yRPpNP6n3A+OSBx476ocFRS7p5Plk92hl4l6bE8lGa2 BN6iPyExL74IU5YMM3WTexZK5rLKreySMQb6CvuKuP7BJw1S9Bxvtga9z smBe4EiAqYKI+4F1l17oRiqSB6Zau6RnYgqpXZOeSNzVuhMeD44XZ2Qgy p3O60ibk310aAOnsoIbYjYmeWVNMSd3LgXfjmKEhhBgow8l3YjMKQZOxZ g==; X-CSE-ConnectionGUID: BCOxaM+xQw2ODPMijRn+Xg== X-CSE-MsgGUID: ApUAX4bvS0O/r4wqYbJuEg== X-IronPort-AV: E=Sophos;i="6.10,222,1719903600"; d="scan'208";a="262677950" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 12 Sep 2024 02:33:18 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 12 Sep 2024 02:33:13 -0700 Received: from ROB-ULT-M76677.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 12 Sep 2024 02:33:10 -0700 From: Andrei Simion To: , , , , , CC: , , , Andrei Simion Subject: [PATCH v2] ARM: dts: microchip: sam9x60: Add missing property atmel,usart-mode Date: Thu, 12 Sep 2024 12:33:07 +0300 Message-ID: <20240912093307.40488-1-andrei.simion@microchip.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240912_023320_143669_BE0786A0 X-CRM114-Status: UNSURE ( 8.77 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the atmel,usart-mode property to the UART nodes. This ensures compliance with the atmel,at91-usart.yaml schema and resolves the errors below: serial@200: $nodename:0: 'serial@200' does not match '^spi(@.*|-([0-9]|[1-9][0-9]+))?$' serial@200: atmel,use-dma-rx: False schema does not allow True serial@200: atmel,use-dma-tx: False schema does not allow True serial@200: atmel,fifo-size: False schema does not allow [[16]] These errors indicate that the property atmel,usart-mode = is missing for UART nodes 0, 1, 2, 3, 4, 6, 7, 8, 9, 10, 11, and 12. Fixes: 99c808335877 ("ARM: dts: at91: sam9x60: Add missing flexcom definitions") Acked-by: Nicolas Ferre Signed-off-by: Andrei Simion --- v1 -> v2: - reword commit message - add Acked-by received in V1 --- arch/arm/boot/dts/microchip/sam9x60.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) base-commit: 32ffa5373540a8d1c06619f52d019c6cdc948bb4 diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi index 04a6d716ecaf..0ba424bba7cc 100644 --- a/arch/arm/boot/dts/microchip/sam9x60.dtsi +++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi @@ -174,6 +174,7 @@ flx4: flexcom@f0000000 { uart4: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -376,6 +377,7 @@ flx11: flexcom@f0020000 { uart11: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -427,6 +429,7 @@ flx12: flexcom@f0024000 { uart12: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -586,6 +589,7 @@ flx6: flexcom@f8010000 { uart6: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -637,6 +641,7 @@ flx7: flexcom@f8014000 { uart7: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -688,6 +693,7 @@ flx8: flexcom@f8018000 { uart8: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -739,6 +745,7 @@ flx0: flexcom@f801c000 { uart0: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -809,6 +816,7 @@ flx1: flexcom@f8020000 { uart1: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -879,6 +887,7 @@ flx2: flexcom@f8024000 { uart2: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -949,6 +958,7 @@ flx3: flexcom@f8028000 { uart3: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -1074,6 +1084,7 @@ flx9: flexcom@f8040000 { uart9: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -1125,6 +1136,7 @@ flx10: flexcom@f8044000 { uart10: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) |