Message ID | 20240919-pcie_ep_range-v1-1-b3e9d62780b7@nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240919-pcie_ep_range-v1-1-b3e9d62780b7@nxp.com> References: <20240919-pcie_ep_range-v1-0-b3e9d62780b7@nxp.com> In-Reply-To: <20240919-pcie_ep_range-v1-0-b3e9d62780b7@nxp.com> To: Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= <kw@linux.com>, Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>, Rob Herring <robh@kernel.org>, Bjorn Helgaas <bhelgaas@google.com>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Abraham I <kishon@kernel.org>, Saravana Kannan <saravanak@google.com>, Jingoo Han <jingoohan1@gmail.com>, Gustavo Pimentel <gustavo.pimentel@synopsys.com>, Jesper Nilsson <jesper.nilsson@axis.com>, Richard Zhu <hongxing.zhu@nxp.com>, Lucas Stach <l.stach@pengutronix.de>, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com> Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@axis.com, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, =?utf-8?q?Krzys?= =?utf-8?q?ztof_Wilczy=C5=84ski?= <kwilczynski@kernel.org>, Frank Li <Frank.Li@nxp.com> X-Mailer: b4 0.13-dev-e586c X-Developer-Signature: v=1; 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PCI-EP: Add 'ranges' support for PCI endpoint devices
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diff --git a/Documentation/devicetree/bindings/pci/pci-ep.yaml b/Documentation/devicetree/bindings/pci/pci-ep.yaml index f75000e3093db..2de00d2bf7326 100644 --- a/Documentation/devicetree/bindings/pci/pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/pci-ep.yaml @@ -17,6 +17,26 @@ properties: $nodename: pattern: "^pcie-ep@" + ranges: + description: + Outbound memory regions, which is extend reg 'addr_space' if pci bus + address is not equal cpu address or there are more one outbound + memory regions. + oneOf: + - type: boolean + - minItems: 1 + maxItems: 32 # Should be enough + items: + minItems: 5 + maxItems: 8 + additionalItems: true + items: + - enum: + - 0x42000000 + - 0x43000000 + - 0x82000000 + - 0x83000000 + max-functions: description: Maximum number of functions that can be configured $ref: /schemas/types.yaml#/definitions/uint8 @@ -42,6 +62,16 @@ properties: default: 1 maximum: 16 + device_type: + $ref: /schemas/types.yaml#/definitions/string + const: pci-ep + + "#address-cells": + const: 3 + + "#size-cells": + const: 2 + linux,pci-domain: description: If present this property assigns a fixed PCI domain number to a PCI
The PCI bus device tree supports 'ranges' properties that indicate how to convert PCI addresses to CPU addresses. Many PCI controllers are dual-role controllers, supporting both Root Complex (RC) and Endpoint (EP) modes. The EP side also needs similar information for proper address translation. Add 'ranges' property for pcie-ep, which format is same as PCI's ranges. Signed-off-by: Frank Li <Frank.Li@nxp.com> --- Documentation/devicetree/bindings/pci/pci-ep.yaml | 30 +++++++++++++++++++++++ 1 file changed, 30 insertions(+)