Message ID | 20240919-pcie_ep_range-v1-7-b3e9d62780b7@nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240919-pcie_ep_range-v1-7-b3e9d62780b7@nxp.com> References: <20240919-pcie_ep_range-v1-0-b3e9d62780b7@nxp.com> In-Reply-To: <20240919-pcie_ep_range-v1-0-b3e9d62780b7@nxp.com> To: Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= <kw@linux.com>, Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>, Rob Herring <robh@kernel.org>, Bjorn Helgaas <bhelgaas@google.com>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Abraham I <kishon@kernel.org>, Saravana Kannan <saravanak@google.com>, Jingoo Han <jingoohan1@gmail.com>, Gustavo Pimentel <gustavo.pimentel@synopsys.com>, Jesper Nilsson <jesper.nilsson@axis.com>, Richard Zhu <hongxing.zhu@nxp.com>, Lucas Stach <l.stach@pengutronix.de>, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com> Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@axis.com, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, =?utf-8?q?Krzys?= =?utf-8?q?ztof_Wilczy=C5=84ski?= <kwilczynski@kernel.org>, Frank Li <Frank.Li@nxp.com> X-Mailer: b4 0.13-dev-e586c X-Developer-Signature: v=1; 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PCI-EP: Add 'ranges' support for PCI endpoint devices
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diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml index 84ca12e8b25be..6f6eb1dfff40a 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml @@ -22,6 +22,7 @@ properties: - fsl,imx8mm-pcie-ep - fsl,imx8mq-pcie-ep - fsl,imx8mp-pcie-ep + - fsl,imx8q-pcie-ep - fsl,imx95-pcie-ep clocks: @@ -45,6 +46,9 @@ properties: items: - const: dma + ranges: + maxItems: 1 + required: - compatible - reg @@ -74,6 +78,21 @@ allOf: - const: dbi2 - const: atu + - if: + properties: + compatible: + enum: + - fsl,imx8q-pcie-ep + then: + properties: + reg: + maxItems: 1 + reg-names: + items: + - const: dbi + required: + - ranges + - if: properties: compatible: @@ -109,7 +128,14 @@ allOf: - const: pcie_bus - const: pcie_phy - const: pcie_aux - else: + + - if: + properties: + compatible: + enum: + - fsl,imx8mm-pcie-ep + - fsl,imx8mp-pcie-ep + then: properties: clocks: maxItems: 3 @@ -119,6 +145,20 @@ allOf: - const: pcie_bus - const: pcie_aux + - if: + properties: + compatible: + enum: + - fsl,imxq-pcie-ep + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: dbi + - const: mstr + - const: slv unevaluatedProperties: false
Add new compatible string fsl,imx8q-pcie-ep for iMX8Q. Mark 'ranges' property as required because CPU address is difference PCI address. Signed-off-by: Frank Li <Frank.Li@nxp.com> --- .../devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml | 42 +++++++++++++++++++++- 1 file changed, 41 insertions(+), 1 deletion(-)