Message ID | 20240920-optimize_pll_flag-v1-1-c90d84a80a51@amlogic.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | clk: meson: pll: Update the meson_clk_pll_init execution judgment logic | expand |
diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c index 89f0f04a16ab..8df2add40b57 100644 --- a/drivers/clk/meson/clk-pll.c +++ b/drivers/clk/meson/clk-pll.c @@ -316,8 +316,7 @@ static int meson_clk_pll_init(struct clk_hw *hw) * Keep the clock running, which was already initialized and enabled * from the bootloader stage, to avoid any glitches. */ - if ((pll->flags & CLK_MESON_PLL_NOINIT_ENABLED) && - meson_clk_pll_is_enabled(hw)) + if (meson_clk_pll_is_enabled(hw)) return 0; if (pll->init_count) { diff --git a/drivers/clk/meson/clk-pll.h b/drivers/clk/meson/clk-pll.h index 949157fb7bf5..cccbf52808b1 100644 --- a/drivers/clk/meson/clk-pll.h +++ b/drivers/clk/meson/clk-pll.h @@ -28,7 +28,6 @@ struct pll_mult_range { } #define CLK_MESON_PLL_ROUND_CLOSEST BIT(0) -#define CLK_MESON_PLL_NOINIT_ENABLED BIT(1) struct meson_clk_pll_data { struct parm en;