diff mbox series

[RESEND,1/2] dt-bindings: phy: rockchip,inno-usb2phy: add rk3576

Message ID 20240923025326.10467-1-frank.wang@rock-chips.com (mailing list archive)
State New, archived
Headers show
Series [RESEND,1/2] dt-bindings: phy: rockchip,inno-usb2phy: add rk3576 | expand

Commit Message

Frank Wang Sept. 23, 2024, 2:53 a.m. UTC
Add compatible for the USB2 phy in the Rockchip RK3576 SoC.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
---
 .../devicetree/bindings/phy/rockchip,inno-usb2phy.yaml | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

Comments

Krzysztof Kozlowski Sept. 23, 2024, 9:31 a.m. UTC | #1
On Mon, Sep 23, 2024 at 10:53:25AM +0800, Frank Wang wrote:
> Add compatible for the USB2 phy in the Rockchip RK3576 SoC.
> 
> Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
> ---
>  .../devicetree/bindings/phy/rockchip,inno-usb2phy.yaml | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
> index 5254413137c64..214917e55c0b6 100644
> --- a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
> @@ -20,6 +20,7 @@ properties:
>        - rockchip,rk3366-usb2phy
>        - rockchip,rk3399-usb2phy
>        - rockchip,rk3568-usb2phy
> +      - rockchip,rk3576-usb2phy
>        - rockchip,rk3588-usb2phy
>        - rockchip,rv1108-usb2phy
>  
> @@ -34,10 +35,16 @@ properties:
>      const: 0
>  
>    clocks:
> -    maxItems: 1
> +    minItems: 1
> +    items:
> +      - description: phyclk - PHY input reference clocks.
> +      - description: aclk and aclk_slv are optional and used for USB MMU.
>  
>    clock-names:
> +    minItems: 1
>      const: phyclk
> +    const: aclk
> +    const: aclk_slv

Please test... Not sure what you wanted to achieve here, but maybe
oneOf?

Best regards,
Krzysztof
Frank Wang Sept. 24, 2024, 2:24 a.m. UTC | #2
Hi Krzysztof,
On 2024/9/23 17:31, Krzysztof Kozlowski wrote:
> On Mon, Sep 23, 2024 at 10:53:25AM +0800, Frank Wang wrote:
>> Add compatible for the USB2 phy in the Rockchip RK3576 SoC.
>>
>> Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
>> ---
>>   .../devicetree/bindings/phy/rockchip,inno-usb2phy.yaml | 10 +++++++++-
>>   1 file changed, 9 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
>> index 5254413137c64..214917e55c0b6 100644
>> --- a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
>> +++ b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
>> @@ -20,6 +20,7 @@ properties:
>>         - rockchip,rk3366-usb2phy
>>         - rockchip,rk3399-usb2phy
>>         - rockchip,rk3568-usb2phy
>> +      - rockchip,rk3576-usb2phy
>>         - rockchip,rk3588-usb2phy
>>         - rockchip,rv1108-usb2phy
>>   
>> @@ -34,10 +35,16 @@ properties:
>>       const: 0
>>   
>>     clocks:
>> -    maxItems: 1
>> +    minItems: 1
>> +    items:
>> +      - description: phyclk - PHY input reference clocks.
>> +      - description: aclk and aclk_slv are optional and used for USB MMU.
>>   
>>     clock-names:
>> +    minItems: 1
>>       const: phyclk
>> +    const: aclk
>> +    const: aclk_slv
> Please test... Not sure what you wanted to achieve here, but maybe
> oneOf?

The "aclk" and "aclk_slv" clocks are new in RK3576, you mean the changes 
should be like the below?

@@ -34,10 +35,20 @@ properties:
      const: 0

    clocks:
-    maxItems: 1
+    minItems: 1
+    maxItems: 3

    clock-names:
-    const: phyclk
+    minItems: 1
+    maxItems: 3
+    items:
+      oneOf:
+        - description: PHY input reference clocks.
+          const: phyclk
+        - description: aclk for USB MMU.
+          const: aclk
+        - description: aclk_slv for USB MMU.
+          const: aclk_slv


BR.
Frank

> Best regards,
> Krzysztof
>
Krzysztof Kozlowski Sept. 24, 2024, 7:56 a.m. UTC | #3
On 24/09/2024 04:24, Frank Wang wrote:
> Hi Krzysztof,
> On 2024/9/23 17:31, Krzysztof Kozlowski wrote:
>> On Mon, Sep 23, 2024 at 10:53:25AM +0800, Frank Wang wrote:
>>> Add compatible for the USB2 phy in the Rockchip RK3576 SoC.
>>>
>>> Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
>>> ---
>>>   .../devicetree/bindings/phy/rockchip,inno-usb2phy.yaml | 10 +++++++++-
>>>   1 file changed, 9 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
>>> index 5254413137c64..214917e55c0b6 100644
>>> --- a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
>>> +++ b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
>>> @@ -20,6 +20,7 @@ properties:
>>>         - rockchip,rk3366-usb2phy
>>>         - rockchip,rk3399-usb2phy
>>>         - rockchip,rk3568-usb2phy
>>> +      - rockchip,rk3576-usb2phy
>>>         - rockchip,rk3588-usb2phy
>>>         - rockchip,rv1108-usb2phy
>>>   
>>> @@ -34,10 +35,16 @@ properties:
>>>       const: 0
>>>   
>>>     clocks:
>>> -    maxItems: 1
>>> +    minItems: 1
>>> +    items:
>>> +      - description: phyclk - PHY input reference clocks.
>>> +      - description: aclk and aclk_slv are optional and used for USB MMU.
>>>   
>>>     clock-names:
>>> +    minItems: 1
>>>       const: phyclk
>>> +    const: aclk
>>> +    const: aclk_slv
>> Please test... Not sure what you wanted to achieve here, but maybe
>> oneOf?
> 
> The "aclk" and "aclk_slv" clocks are new in RK3576, you mean the changes 
> should be like the below?
> 
> @@ -34,10 +35,20 @@ properties:
>       const: 0
> 
>     clocks:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 3
> 
>     clock-names:
> -    const: phyclk
> +    minItems: 1
> +    maxItems: 3
> +    items:
> +      oneOf:
> +        - description: PHY input reference clocks.
> +          const: phyclk
> +        - description: aclk for USB MMU.
> +          const: aclk
> +        - description: aclk_slv for USB MMU.
> +          const: aclk_slv

Nope, you just messed the order. Order is strict.

Best regards,
Krzysztof
Krzysztof Kozlowski Sept. 25, 2024, 7:17 a.m. UTC | #4
On 24/09/2024 09:56, Krzysztof Kozlowski wrote:
> On 24/09/2024 04:24, Frank Wang wrote:
>> Hi Krzysztof,
>> On 2024/9/23 17:31, Krzysztof Kozlowski wrote:
>>> On Mon, Sep 23, 2024 at 10:53:25AM +0800, Frank Wang wrote:
>>>> Add compatible for the USB2 phy in the Rockchip RK3576 SoC.
>>>>
>>>> Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
>>>> ---
>>>>   .../devicetree/bindings/phy/rockchip,inno-usb2phy.yaml | 10 +++++++++-
>>>>   1 file changed, 9 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
>>>> index 5254413137c64..214917e55c0b6 100644
>>>> --- a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
>>>> +++ b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
>>>> @@ -20,6 +20,7 @@ properties:
>>>>         - rockchip,rk3366-usb2phy
>>>>         - rockchip,rk3399-usb2phy
>>>>         - rockchip,rk3568-usb2phy
>>>> +      - rockchip,rk3576-usb2phy
>>>>         - rockchip,rk3588-usb2phy
>>>>         - rockchip,rv1108-usb2phy
>>>>   
>>>> @@ -34,10 +35,16 @@ properties:
>>>>       const: 0
>>>>   
>>>>     clocks:
>>>> -    maxItems: 1
>>>> +    minItems: 1
>>>> +    items:
>>>> +      - description: phyclk - PHY input reference clocks.
>>>> +      - description: aclk and aclk_slv are optional and used for USB MMU.
>>>>   
>>>>     clock-names:
>>>> +    minItems: 1
>>>>       const: phyclk
>>>> +    const: aclk
>>>> +    const: aclk_slv
>>> Please test... Not sure what you wanted to achieve here, but maybe
>>> oneOf?
>>
>> The "aclk" and "aclk_slv" clocks are new in RK3576, you mean the changes 
>> should be like the below?
>>
>> @@ -34,10 +35,20 @@ properties:
>>       const: 0
>>
>>     clocks:
>> -    maxItems: 1
>> +    minItems: 1
>> +    maxItems: 3
>>
>>     clock-names:
>> -    const: phyclk
>> +    minItems: 1
>> +    maxItems: 3
>> +    items:
>> +      oneOf:
>> +        - description: PHY input reference clocks.
>> +          const: phyclk
>> +        - description: aclk for USB MMU.
>> +          const: aclk
>> +        - description: aclk_slv for USB MMU.
>> +          const: aclk_slv
> 
> Nope, you just messed the order. Order is strict.

And you still sent v2 with this messed order. No. Order must be strict.
Cannot be oneOf.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
index 5254413137c64..214917e55c0b6 100644
--- a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
+++ b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
@@ -20,6 +20,7 @@  properties:
       - rockchip,rk3366-usb2phy
       - rockchip,rk3399-usb2phy
       - rockchip,rk3568-usb2phy
+      - rockchip,rk3576-usb2phy
       - rockchip,rk3588-usb2phy
       - rockchip,rv1108-usb2phy
 
@@ -34,10 +35,16 @@  properties:
     const: 0
 
   clocks:
-    maxItems: 1
+    minItems: 1
+    items:
+      - description: phyclk - PHY input reference clocks.
+      - description: aclk and aclk_slv are optional and used for USB MMU.
 
   clock-names:
+    minItems: 1
     const: phyclk
+    const: aclk
+    const: aclk_slv
 
   assigned-clocks:
     description:
@@ -144,6 +151,7 @@  allOf:
             enum:
               - rockchip,rk3568-usb2phy
               - rockchip,rk3588-usb2phy
+              - rockchip,rk3576-usb2phy
 
     then:
       properties: