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[v2,2/2] ARM: dts: aspeed: yosemite4: revise flash layout to 128MB

Message ID 20240924094430.272074-3-Delphine_CC_Chiu@wiwynn.com (mailing list archive)
State New, archived
Headers show
Series Adjust the setting for SPI flash of yosemite4 | expand

Commit Message

Delphine CC Chiu Sept. 24, 2024, 9:44 a.m. UTC 
From: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>

Revise flash layout to 128MB since we are using 1GB flash memory in our
project.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
 arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index c4af50ba6999..3073ade6d77c 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -108,7 +108,7 @@  flash@0 {
 		spi-tx-bus-width = <2>;
 		spi-rx-bus-width = <2>;
 		spi-max-frequency = <50000000>;
-#include "openbmc-flash-layout-64.dtsi"
+#include "openbmc-flash-layout-128.dtsi"
 	};
 	flash@1 {
 		status = "okay";