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it's a system controller. In addition to clock controls, it provides display pipeline routing controls and other miscellaneous control registers. On the MT8188 and MT8195 SoCs, the mmsys blocks utilize the same mmsys driver but have been aliased to "vdosys" and "vppsys", likely to better represent their actual functionality. Update the vppsys node names and compatibles in MT8188 DT to reflect that and fix dtbs_check errors against mediatek/mt8188-evb.dtb. Signed-off-by: Fei Shao Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8188.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi index a6cd08ea74eb..98ba3485a8bd 100644 --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi @@ -1783,8 +1783,8 @@ mfgcfg: clock-controller@13fbf000 { #clock-cells = <1>; }; - vppsys0: clock-controller@14000000 { - compatible = "mediatek,mt8188-vppsys0"; + vppsys0: syscon@14000000 { + compatible = "mediatek,mt8188-vppsys0", "syscon"; reg = <0 0x14000000 0 0x1000>; #clock-cells = <1>; }; @@ -1801,8 +1801,8 @@ wpesys_vpp0: clock-controller@14e02000 { #clock-cells = <1>; }; - vppsys1: clock-controller@14f00000 { - compatible = "mediatek,mt8188-vppsys1"; + vppsys1: syscon@14f00000 { + compatible = "mediatek,mt8188-vppsys1", "syscon"; reg = <0 0x14f00000 0 0x1000>; #clock-cells = <1>; };