From patchwork Mon Sep 30 11:15:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 13815839 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D7AB4CF6499 for ; Mon, 30 Sep 2024 11:17:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=/6aOaHEijaebC4X0cTgxm/vVUhcilH7QcmkZ4BzLP5M=; b=ekYpgIPFXPATbGLzLWcWDlxCip V6O3qa7lCwOAxUvx0wtKLvA2hmm8AAtJy5CuP8kHHPV1kdqsKx/S/6GbhG2ibLf/JFDJeiLcDLxdM AuCeJ056i8kr5zsd3Olhk6Nvp65nPRC6WvaF8+W+hLd/bBzc57ylLp7dis/23x3Fyy+uPz/RLzdDQ po3S1pmxrHQ7BuusFv+C9OHSvPK/iXPf+IzoRqw0ZmePAEiWG+vWSUyEo7xBuMioln6ZLSjAjqc/o 1QLFkgst+Ju/JIWODPFMoOB5hOdvxwVZfOJQToo+zYg/dwuHRL1c/OIMD71XHTVrswYT7R+NdQ22C HRrbd8aA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1svEPC-0000000Gp77-02Nn; Mon, 30 Sep 2024 11:17:30 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1svEMz-0000000Go5d-2m7I for linux-arm-kernel@lists.infradead.org; Mon, 30 Sep 2024 11:15:15 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 48UBF9Ds072041; Mon, 30 Sep 2024 06:15:09 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1727694909; bh=/6aOaHEijaebC4X0cTgxm/vVUhcilH7QcmkZ4BzLP5M=; h=From:To:CC:Subject:Date; b=klhcrj9Ra15EYq+691UjIE3iMLFUgjp8k2jQjO5CgrtBc5K3C+jeLmj1eDKa5yX09 6LkgFywCuelkbw+bNJe/VoJJ8OCZghHQ1J78rFmqS7AskkJgWZ4+xTWHYMzYp3RuAP KJVkkWQDwFLpS5TyLxMLKTnaqg+1gGYVF4k0n2I0= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 48UBF9Ii122516 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 30 Sep 2024 06:15:09 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 30 Sep 2024 06:15:09 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 30 Sep 2024 06:15:09 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [10.24.72.81]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 48UBF5Eo130049; Mon, 30 Sep 2024 06:15:06 -0500 From: Siddharth Vadapalli To: , , , , , CC: , , , , Subject: [PATCH v2] arm64: dts: ti: k3-j784s4-main: Enable ACSPCIE output for PCIe1 Date: Mon, 30 Sep 2024 16:45:05 +0530 Message-ID: <20240930111505.3101047-1-s-vadapalli@ti.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240930_041513_815943_C47B2C50 X-CRM114-Status: GOOD ( 13.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The PCIe reference clock required by the PCIe Endpoints connected to the PCIe connector corresponding to the PCIe1 instance of PCIe on J784S4-EVM is driven by the ACSPCIE module. Add the device-tree support for enabling the same. Signed-off-by: Siddharth Vadapalli --- Hello, This patch is based on linux-next tagged next-20240930. The dependencies mentioned in the v1 patch have been merged and this patch doesn't have dependencies anymore. v1: https://lore.kernel.org/r/20240715123301.1184833-1-s-vadapalli@ti.com/ Changes since v1: - Rebased patch on next-20240930. Logs validating this patch with an NVMe SSD connected to the PCIe connector corresponding to the PCIe1 instance of PCIe on J784S4 EVM: https://gist.github.com/Siddharth-Vadapalli-at-TI/19a878518b657df434396b4bed78f945 Regards, Siddharth. arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi index e73bb750b09a..bef115575cab 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -7,6 +7,7 @@ #include #include +#include #include #include "k3-serdes.h" @@ -81,6 +82,11 @@ pcie3_ctrl: pcie3-ctrl@407c { reg = <0x407c 0x4>; }; + acspcie0_proxy_ctrl: acspcie0-ctrl@1a090 { + compatible = "ti,j784s4-acspcie-proxy-ctrl", "syscon"; + reg = <0x1a090 0x4>; + }; + serdes_ln_ctrl: mux-controller@4080 { compatible = "reg-mux"; reg = <0x00004080 0x30>; @@ -1094,11 +1100,12 @@ pcie1_rc: pcie@2910000 { interrupts = ; device_type = "pci"; ti,syscon-pcie-ctrl = <&pcie1_ctrl 0x0>; + ti,syscon-acspcie-proxy-ctrl = <&acspcie0_proxy_ctrl 0x1>; max-link-speed = <3>; num-lanes = <4>; power-domains = <&k3_pds 333 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 333 0>; - clock-names = "fck"; + clocks = <&k3_clks 333 0>, <&serdes0 CDNS_TORRENT_REFCLK_DRIVER>; + clock-names = "fck", "pcie_refclk"; #address-cells = <3>; #size-cells = <2>; bus-range = <0x0 0xff>;