From patchwork Tue Oct 1 13:50:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Machon X-Patchwork-Id: 13818050 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DA039CEACC6 for ; Tue, 1 Oct 2024 14:04:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:CC:To:In-Reply-To:References :Message-ID:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=xqWLNb5F/9K8mXNBFOIHHrkECPPWOyUnX8VkXD3iS/s=; b=VXHxl0yqVYeSn3Vw9yUOgXV98R lYfeqxVQbzcu+n0JGgkx9HfTAcuO54/Gqex+BGchQcnWjkJ1tPu1+9jngYRJvi+hkh/4G+QK5zZGC KMEViUNwHT26g83YW2+GGU7RwUCmwPCU+Vu9BsTMkx1UVUHeDjuWZ20TrG16Kty19DgApNAVLJuY9 ZUnAQjHFU73NRyzh6anXylahRFSMcbs5DoYUHInrPLkqDDxacUHMjl3OqcLRrj4QNAxQBvEc2GNsz cgTdiTmnaJjNYoWvB+oC6u97K35ZQZRODTzqfbPX/VQZra8bbKq5debfEFn/PEdtDNgHyf/Tn9pyH uLHTusfQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1svdTw-000000033gA-2hW2; Tue, 01 Oct 2024 14:04:04 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1svdIB-000000030gm-2JdI for linux-arm-kernel@lists.infradead.org; Tue, 01 Oct 2024 13:51:57 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1727790715; x=1759326715; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=IQNwJFI8TvMFVZPm7mnfUOkdmc9DC93Mfp8/gqo+RIA=; b=bqk+yBSd0hts6DakTxLV+KB5q//GZXOcyF40tLlNBgvReczlRqKefFZR 9y6cL7wmuWWRv5KKeEpqSvsS+ghR6F/WrBaNXn7T55HzdF1dsWgnUshZt 1u1PKAhzjU6Fi0s9EjAVjwqB5IRcEim51VMJ8GQwEA5K0A4pvF7C9y/pM mfGih1sS+IQue0nQAhZEKTV2Bpym+FirSMOb3gc+iqwZqrcPyv0ENHQtN +NaOZi9orsw5t0UQnHAS9OsnbAzZVRUjdZIc1JcuNcldhxJnZ8BkiDwBp k9L4MqUgU50C445qHGWbPcsUGsRmQXwxxDHkcLU5SPfwdptMcn0TaM/B8 g==; X-CSE-ConnectionGUID: PEtbMb/SSnq9y/Yd81naGA== X-CSE-MsgGUID: D4z/zEJoRtS4sikhG2sAAg== X-IronPort-AV: E=Sophos;i="6.11,167,1725346800"; d="scan'208";a="199893172" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 01 Oct 2024 06:51:53 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 1 Oct 2024 06:51:38 -0700 Received: from DEN-DL-M70577.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 1 Oct 2024 06:51:35 -0700 From: Daniel Machon Date: Tue, 1 Oct 2024 15:50:42 +0200 Subject: [PATCH net-next 12/15] net: sparx5: ops out function for setting the port mux MIME-Version: 1.0 Message-ID: <20241001-b4-sparx5-lan969x-switch-driver-v1-12-8c6896fdce66@microchip.com> References: <20241001-b4-sparx5-lan969x-switch-driver-v1-0-8c6896fdce66@microchip.com> In-Reply-To: <20241001-b4-sparx5-lan969x-switch-driver-v1-0-8c6896fdce66@microchip.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lars Povlsen , "Steen Hegelund" , , , , Richard Cochran , , , , , CC: , , X-Mailer: b4 0.14-dev X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241001_065155_716594_887A05FE X-CRM114-Status: GOOD ( 13.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Port muxing is configured based on the supported port modes. As these modes can differ on Sparx5 and lan969x we ops out the port muxing function. Signed-off-by: Daniel Machon Reviewed-by: Steen Hegelund --- drivers/net/ethernet/microchip/sparx5/sparx5_main.c | 1 + drivers/net/ethernet/microchip/sparx5/sparx5_main.h | 6 ++++++ drivers/net/ethernet/microchip/sparx5/sparx5_port.c | 7 +++---- 3 files changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c index 0d8cb9a3ed1f..bcdce23b735f 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c @@ -986,6 +986,7 @@ static const struct sparx5_ops sparx5_ops = { .get_port_dev_bit = &sparx5_port_dev_mapping, .get_hsch_max_group_rate = &sparx5_get_hsch_max_group_rate, .get_sdlb_group = &sparx5_get_sdlb_group, + .set_port_mux = &sparx5_port_mux_set, }; static const struct sparx5_match_data sparx5_desc = { diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h index 99174aef88f8..6fe840dbaf98 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h @@ -269,6 +269,8 @@ struct sparx5_ops { u32 (*get_port_dev_bit)(struct sparx5 *sparx5, int port); u32 (*get_hsch_max_group_rate)(int grp); struct sparx5_sdlb_group *(*get_sdlb_group)(int idx); + int (*set_port_mux)(struct sparx5 *sparx5, struct sparx5_port *port, + struct sparx5_port_config *conf); }; struct sparx5_main_io_resource { @@ -490,6 +492,10 @@ int sparx5_pool_get(struct sparx5_pool_entry *pool, int size, u32 *id); int sparx5_pool_get_with_idx(struct sparx5_pool_entry *pool, int size, u32 idx, u32 *id); +/* sparx5_port.c */ +int sparx5_port_mux_set(struct sparx5 *sparx5, struct sparx5_port *port, + struct sparx5_port_config *conf); + /* sparx5_sdlb.c */ #define SPX5_SDLB_PUP_TOKEN_DISABLE 0x1FFF #define SPX5_SDLB_PUP_TOKEN_MAX (SPX5_SDLB_PUP_TOKEN_DISABLE - 1) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c index 49ff94db0e63..0dc2201fe653 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c @@ -516,9 +516,8 @@ static int sparx5_port_fifo_sz(struct sparx5 *sparx5, /* Configure port muxing: * QSGMII: 4x2G5 devices */ -static int sparx5_port_mux_set(struct sparx5 *sparx5, - struct sparx5_port *port, - struct sparx5_port_config *conf) +int sparx5_port_mux_set(struct sparx5 *sparx5, struct sparx5_port *port, + struct sparx5_port_config *conf) { u32 portno = port->portno; u32 inst; @@ -1039,7 +1038,7 @@ int sparx5_port_init(struct sparx5 *sparx5, pcsinst = spx5_inst_get(sparx5, pcs, pix); /* Set the mux port mode */ - err = sparx5_port_mux_set(sparx5, port, conf); + err = ops->set_port_mux(sparx5, port, conf); if (err) return err;