diff mbox series

[03/47] arm64/sysreg: Update register fields for ID_AA64PFR0_EL1

Message ID 20241001024356.1096072-4-anshuman.khandual@arm.com (mailing list archive)
State New
Headers show
Series KVM: arm64: Enable FGU (Fine Grained Undefined) for FEAT_FGT2 registers | expand

Commit Message

Anshuman Khandual Oct. 1, 2024, 2:43 a.m. UTC 
This updates ID_AA64PFR0_EL1.RAS and ID_AA64PFR0_EL1.RME register fields as
per the definitions based on DDI0601 2024-06.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/tools/sysreg | 2 ++
 1 file changed, 2 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 0e90d40af2bd..6c0893d0204a 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -873,6 +873,7 @@  EndEnum
 UnsignedEnum	55:52	RME
 	0b0000	NI
 	0b0001	IMP
+	0b0010	GPC2
 EndEnum
 UnsignedEnum	51:48	DIT
 	0b0000	NI
@@ -899,6 +900,7 @@  UnsignedEnum	31:28	RAS
 	0b0000	NI
 	0b0001	IMP
 	0b0010	V1P1
+	0b0011	V2
 EndEnum
 UnsignedEnum	27:24	GIC
 	0b0000	NI