diff mbox series

[41/47] arm64/sysreg: Add register fields for MDSTEPOP_EL1

Message ID 20241001024356.1096072-42-anshuman.khandual@arm.com (mailing list archive)
State New
Headers show
Series KVM: arm64: Enable FGU (Fine Grained Undefined) for FEAT_FGT2 registers | expand

Commit Message

Anshuman Khandual Oct. 1, 2024, 2:43 a.m. UTC 
This adds register fields for MDSTEPOP_EL1 as per the definitions based
on DDI0601 2024-06.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/tools/sysreg | 5 +++++
 1 file changed, 5 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index ad7a1dc05f8a..815e53200823 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -104,6 +104,11 @@  EndEnum
 Res0	3:0
 EndSysreg
 
+Sysreg	MDSTEPOP_EL1	2	0	0	5	2
+Res0	63:32
+Field	31:0	OPCODE
+EndSysreg
+
 Sysreg	OSECCR_EL1	2	0	0	6	2
 Res0	63:32
 Field	31:0	EDECCR