From patchwork Tue Oct 1 02:43:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 13817409 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D1CB3CEB2E3 for ; Tue, 1 Oct 2024 03:40:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=M+sP11rrD9BfDQv6CSNw8IUbn+L7nGz7OmwOSVNpFXk=; b=abXTa33CKD+6m6c18B1mnWUiYo v8FZnELF1w1MjvanUjPL9tBXmF0/yMVQyEIxYUECYAX1RTKuwEbxZFn6umOzFq3UOrK+JqMW2HjK8 /iSuKIVxuRlVqoprfLwV5Sd6o7Ux2WElesQNBOeGZAwBgJpKc9/sNye9m9cfZiiXGiiSjh0RxbpOV J2B29jL7l9mc1MR4DeuKLGApxuOvpd4Rmemi1MExrTM4JV7kXDZgLdRrhfrfoLUK3zOcQLs+Et91S RjOyKPzo2aziZYSkVkP0WkKune0MHE9ats+1HsvR21mcg4+V8mKnF0E5slp70tDYVVGHkCSyHbGDf qiFqYLCw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1svTk9-00000001V28-2QF5; Tue, 01 Oct 2024 03:40:09 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1svSum-00000001O3X-1Kkk for linux-arm-kernel@lists.infradead.org; Tue, 01 Oct 2024 02:47:05 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 82E6DDA7; Mon, 30 Sep 2024 19:47:33 -0700 (PDT) Received: from a077893.blr.arm.com (a077893.blr.arm.com [10.162.16.61]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 9A91A3F58B; Mon, 30 Sep 2024 19:47:00 -0700 (PDT) From: Anshuman Khandual To: linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, maz@kernel.org Cc: Anshuman Khandual , Oliver Upton , James Morse , Suzuki K Poulose , Catalin Marinas , Will Deacon , Mark Brown Subject: [PATCH 45/47] KVM: arm64: nv: Add FEAT_FGT2 registers access from virtual EL2 Date: Tue, 1 Oct 2024 08:13:54 +0530 Message-Id: <20241001024356.1096072-46-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241001024356.1096072-1-anshuman.khandual@arm.com> References: <20241001024356.1096072-1-anshuman.khandual@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240930_194704_462691_6DDC2443 X-CRM114-Status: UNSURE ( 8.69 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This adds VNCR-capable HDFGRTR2_EL2, HDFGWTR2_EL2, HFGRTR2_EL2, HFGWTR2_EL2 and HFGITR2_EL2 FEAT_FGT2 registers into enum vcpu_sysreg, and also enables their access from virtual EL2 environment. Cc: Marc Zyngier Cc: Oliver Upton Cc: James Morse Cc: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org Cc: kvmarm@lists.linux.dev Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- arch/arm64/include/asm/kvm_host.h | 5 +++++ arch/arm64/include/asm/vncr_mapping.h | 5 +++++ arch/arm64/kvm/sys_regs.c | 5 +++++ 3 files changed, 15 insertions(+) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 329619c6fa96..09291e1e42c9 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -532,6 +532,11 @@ enum vcpu_sysreg { VNCR(HDFGWTR_EL2), VNCR(HAFGRTR_EL2), + VNCR(HDFGRTR2_EL2), + VNCR(HDFGWTR2_EL2), + VNCR(HFGITR2_EL2), + VNCR(HFGRTR2_EL2), + VNCR(HFGWTR2_EL2), VNCR(CNTVOFF_EL2), VNCR(CNTV_CVAL_EL0), VNCR(CNTV_CTL_EL0), diff --git a/arch/arm64/include/asm/vncr_mapping.h b/arch/arm64/include/asm/vncr_mapping.h index 06f8ec0906a6..8eab837196d0 100644 --- a/arch/arm64/include/asm/vncr_mapping.h +++ b/arch/arm64/include/asm/vncr_mapping.h @@ -38,6 +38,8 @@ #define VNCR_HFGRTR_EL2 0x1B8 #define VNCR_HFGWTR_EL2 0x1C0 #define VNCR_HFGITR_EL2 0x1C8 +#define VNCR_HDFGRTR2_EL2 0x1A0 +#define VNCR_HDFGWTR2_EL2 0x1B0 #define VNCR_HDFGRTR_EL2 0x1D0 #define VNCR_HDFGWTR_EL2 0x1D8 #define VNCR_ZCR_EL1 0x1E0 @@ -53,6 +55,9 @@ #define VNCR_PIRE0_EL2 0x298 #define VNCR_PIR_EL1 0x2A0 #define VNCR_POR_EL1 0x2A8 +#define VNCR_HFGRTR2_EL2 0x2C0 +#define VNCR_HFGWTR2_EL2 0x2C8 +#define VNCR_HFGITR2_EL2 0x310 #define VNCR_ICH_LR0_EL2 0x400 #define VNCR_ICH_LR1_EL2 0x408 #define VNCR_ICH_LR2_EL2 0x410 diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index dad88e31f953..778731491f79 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -2794,9 +2794,14 @@ static const struct sys_reg_desc sys_reg_descs[] = { EL2_REG_VNCR(VTCR_EL2, reset_val, 0), { SYS_DESC(SYS_DACR32_EL2), undef_access, reset_unknown, DACR32_EL2 }, + EL2_REG_VNCR(HDFGRTR2_EL2, reset_val, 0), + EL2_REG_VNCR(HDFGWTR2_EL2, reset_val, 0), + EL2_REG_VNCR(HFGRTR2_EL2, reset_val, 0), + EL2_REG_VNCR(HFGWTR2_EL2, reset_val, 0), EL2_REG_VNCR(HDFGRTR_EL2, reset_val, 0), EL2_REG_VNCR(HDFGWTR_EL2, reset_val, 0), EL2_REG_VNCR(HAFGRTR_EL2, reset_val, 0), + EL2_REG_VNCR(HFGITR2_EL2, reset_val, 0), EL2_REG_REDIR(SPSR_EL2, reset_val, 0), EL2_REG_REDIR(ELR_EL2, reset_val, 0), { SYS_DESC(SYS_SP_EL1), access_sp_el1},