| Message ID | 20241001105016.1068558-1-andre.przywara@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | clk: sunxi-ng: d1: Fix PLL_AUDIO0 preset | expand |
On Tue, 01 Oct 2024 11:50:16 +0100, Andre Przywara wrote: > To work around a limitation in our clock modelling, we try to force two > bits in the AUDIO0 PLL to 0, in the CCU probe routine. > However the ~ operator only applies to the first expression, and does > not cover the second bit, so we end up clearing only bit 1. > > Group the bit-ORing with parentheses, to make it both clearer to read > and actually correct. > > [...] Applied to clk-for-6.13 in git@github.com:linux-sunxi/linux-sunxi.git, thanks! [1/1] clk: sunxi-ng: d1: Fix PLL_AUDIO0 preset commit: e0f253a52ccee3cf3eb987e99756e20c68a1aac9 Best regards,
diff --git a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c index 9b5cfac2ee70c..3f095515f54f9 100644 --- a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c +++ b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c @@ -1371,7 +1371,7 @@ static int sun20i_d1_ccu_probe(struct platform_device *pdev) /* Enforce m1 = 0, m0 = 0 for PLL_AUDIO0 */ val = readl(reg + SUN20I_D1_PLL_AUDIO0_REG); - val &= ~BIT(1) | BIT(0); + val &= ~(BIT(1) | BIT(0)); writel(val, reg + SUN20I_D1_PLL_AUDIO0_REG); /* Force fanout-27M factor N to 0. */
To work around a limitation in our clock modelling, we try to force two bits in the AUDIO0 PLL to 0, in the CCU probe routine. However the ~ operator only applies to the first expression, and does not cover the second bit, so we end up clearing only bit 1. Group the bit-ORing with parentheses, to make it both clearer to read and actually correct. Fixes: 35b97bb94111 ("clk: sunxi-ng: Add support for the D1 SoC clocks") Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- Hi, this should double that PLL's frequency by 0, since we drop the unwanted divider. Not sure if anyone has spotted the problem before, and maybe worked around it? If that extra divider is correct, the comment should be adjusted instead. Cheers, Andre drivers/clk/sunxi-ng/ccu-sun20i-d1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)