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AJvYcCUhLNRyevW90mVvlF7o/guj4a+3vaRaWjo5agyt87vTwZuwvq2IuK6yKILMrC/uTFJe3L5EJ039WyCGM6RCo/c/@lists.infradead.org X-Gm-Message-State: AOJu0YyOlKKYskryAal9oMITyTDCwa3Aq9gc2s0lcpiI0GUeXvQtkNpT KGSL0gybsh52rGMhgT2E1biGGYgvu3s+DRrhkZBeJwT5MYcwriHT4hfmAltsNA== X-Google-Smtp-Source: AGHT+IEKMhrohdkvwi4Udq7vmrZm1RN5zUB0skQ6nIN1r9c0R1TPgRRbL55DWTsl/CIJ8EZMUnlJMA== X-Received: by 2002:a05:6a00:8c2:b0:710:bd4b:8b96 with SMTP id d2e1a72fcca58-71b26079af9mr22686021b3a.28.1727782283633; Tue, 01 Oct 2024 04:31:23 -0700 (PDT) Received: from fshao-p620.tpe.corp.google.com ([2401:fa00:1:10:e044:f156:126b:d5c6]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71b264b63d9sm7810646b3a.52.2024.10.01.04.31.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Oct 2024 04:31:23 -0700 (PDT) From: Fei Shao To: AngeloGioacchino Del Regno Cc: Fei Shao , Krzysztof Kozlowski , Bjorn Helgaas , Conor Dooley , Jianjun Wang , Krzysztof Kozlowski , =?utf-8?q?Krzysztof_Wilczy=C5=84s?= =?utf-8?q?ki?= , Lorenzo Bianconi , Lorenzo Pieralisi , Manivannan Sadhasivam , Matthias Brugger , Rob Herring , Ryder Lee , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pci@vger.kernel.org Subject: [PATCH v2 2/8] dt-bindings: PCI: mediatek-gen3: Allow exact number of clocks only Date: Tue, 1 Oct 2024 19:27:20 +0800 Message-ID: <20241001113052.3124869-3-fshao@chromium.org> X-Mailer: git-send-email 2.46.1.824.gd892dcdcdd-goog In-Reply-To: <20241001113052.3124869-1-fshao@chromium.org> References: <20241001113052.3124869-1-fshao@chromium.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241001_043124_919561_6F3FF397 X-CRM114-Status: GOOD ( 13.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In MediaTek PCIe gen3 bindings, "clocks" accepts a range of 1-6 clocks across all SoCs. But in practice, each SoC requires a particular number of clocks as defined in "clock-names", and the length of "clocks" and "clock-names" can be inconsistent with current bindings. For example: - MT8188, MT8192 and MT8195 all require 6 clocks, while the bindings accept 4-6 clocks. - MT7986 requires 4 clocks, while the bindings accept 4-6 clocks. Update minItems and maxItems properties for individual SoCs as needed to only accept the correct number of clocks. Fixes: c6abd0eadec6 ("dt-bindings: PCI: mediatek-gen3: Add support for Airoha EN7581") Reviewed-by: Krzysztof Kozlowski Signed-off-by: Fei Shao --- (no changes since v1) .../devicetree/bindings/pci/mediatek-pcie-gen3.yaml | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml index 898c1be2d6a4..f05aab2b1add 100644 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml @@ -149,7 +149,7 @@ allOf: then: properties: clocks: - minItems: 4 + minItems: 6 clock-names: items: @@ -178,7 +178,7 @@ allOf: then: properties: clocks: - minItems: 4 + minItems: 6 clock-names: items: @@ -207,6 +207,7 @@ allOf: properties: clocks: minItems: 4 + maxItems: 4 clock-names: items: