From patchwork Thu Oct 3 18:53:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 13821454 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C9ABCCF34BC for ; Thu, 3 Oct 2024 19:03:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=pcJ9HvI6TQKI/4qWHahUjAlLbPplsBPe0bc1dX1yamw=; b=pGRdvuiVorXWTycKOhPTcm/fbp M5O+srxEMdXvfRFtASjQBUgSlIxV+WP3abPdnJVwc0kxDsGGhsd75qjlPzP07jDt5qcFG1unnsbiP DnfNWkIPt0t+Wc0v5rAf25cXuQpnMOUNQ85PGxuq63uOTqsZ/iClS6E/NVjr6Fj9/Wyx9HdvbA4z7 0smORe1GwtWxF5RWE/yJ8TpO7Z6GNgBebC7szUwe44RfMYSIf8/BUhQYwHR0yTWTIu5FfhLR5my7o NOGst0lMBXfmLm4+o6/IcKFWTkbRVszxBiRxMtVpvvghqBSEDcKVmlawQp9c0Lpr0moTRMXg3GkXU pioX0AQg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1swR72-0000000A9rM-267d; Thu, 03 Oct 2024 19:03:44 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1swQxT-0000000A8Fd-1TEg for linux-arm-kernel@lists.infradead.org; Thu, 03 Oct 2024 18:53:52 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5DE7B339; Thu, 3 Oct 2024 11:54:20 -0700 (PDT) Received: from e132581.cambridge.arm.com (e132581.arm.com [10.2.76.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C23143F640; Thu, 3 Oct 2024 11:53:48 -0700 (PDT) From: Leo Yan To: Arnaldo Carvalho de Melo , Namhyung Kim , Besar Wicaksono , James Clark , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , "Liang, Kan" , John Garry , Will Deacon , Mike Leach , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Leo Yan Subject: [PATCH v3 7/7] perf arm-spe: Add Cortex CPUs to common data source encoding list Date: Thu, 3 Oct 2024 19:53:22 +0100 Message-Id: <20241003185322.192357-8-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241003185322.192357-1-leo.yan@arm.com> References: <20241003185322.192357-1-leo.yan@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241003_115351_457834_E84B1626 X-CRM114-Status: GOOD ( 10.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add Cortex-A720, Cortex-A725, Cortex-X1C, Cortex-X3 and Cortex-X925 into the common data source encoding list. For everyone of these CPUs, it technical reference manual defines the data source packet as the common encoding format. Signed-off-by: Leo Yan --- tools/perf/util/arm-spe.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c index 5c34a9ae3862..c424e5b9a11d 100644 --- a/tools/perf/util/arm-spe.c +++ b/tools/perf/util/arm-spe.c @@ -428,6 +428,11 @@ static int arm_spe__synth_instruction_sample(struct arm_spe_queue *speq, } static const struct midr_range common_ds_encoding_cpus[] = { + MIDR_ALL_VERSIONS(MIDR_CORTEX_A720), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A725), + MIDR_ALL_VERSIONS(MIDR_CORTEX_X1C), + MIDR_ALL_VERSIONS(MIDR_CORTEX_X3), + MIDR_ALL_VERSIONS(MIDR_CORTEX_X925), MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1), MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2), MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1),