From patchwork Thu Oct 10 09:31:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manikandan Muralidharan X-Patchwork-Id: 13829935 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6D7C5CF11CE for ; Thu, 10 Oct 2024 10:46:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=j9te5lGzAbm8pMtykcfnG46Bu0d1G5LPHXk85CGk6a8=; b=kPNjOeqexh01TOlIqHGcx/3Eq4 7/Ohw+sG27zIbfUaGpP2hFN0cobWnxuLpSaML2M+1NQf2S8oKDquV2LVjwcF6MCvE7l7Zkl+EQ15m AjQgBt9uCZyqvJF2lPUoXleFTZErbnLNzQq/fUmTbWFevrIgv4QX7sHxnFEn2hjPTnNL69DCIJTCG /jrcHvrJR+gwMy7/mAJZvzVQ9r0Zd55fg3hUg0iV/BrGIl7H0nK3iW6nWKyIggvgsQ9u0H0/cmMOj WTGA8xF4Aiw4EQShc5bYF6P8sPwd4qfD67G+1yCtsvAUUlf1pDSPnVIzbP9FkLCZQcu6/3IjYHprz NVbL1jIw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1syqgH-0000000CRtd-08gP; Thu, 10 Oct 2024 10:46:05 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1sypXI-0000000CFMp-3cWX for linux-arm-kernel@lists.infradead.org; Thu, 10 Oct 2024 09:32:47 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1728552765; x=1760088765; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=FUvEZdexLb0egQbluawfFMb4prI6pmJNwKqr+VU6HKk=; b=GhjbLrRGDUyDPBN0c2LkF7qTYAN9XO1YfuXxjYG4IKKDKJ1JMZZGzE9U 26QSXrOHZW2s0vB08uCn8u6gyqNXabDWA5RbIuFIVseLGgXOg0MEvTXuA nwjf8Jd/ZnlTXDOnOh3bOz3g13pWwXmBtUDG/0HIkslU0wVOF9B8ElVdx h4AL/tD7JOZGKfgZKEw8S0Mympwjs6RA6kVsqdev+vzE+PXKeEIA9z+3O 2mIwZkeMIzjLxkqa8ge8/V2KR1G/7wzySI7IxMILq9YLOFgq1fxODDVbK +mgEFlY+EclVK0vUn9qbUbrwIHHtVI2mRR9U8QZh4dEyc0Z56Nt/sKJDQ w==; X-CSE-ConnectionGUID: BI64UNzWQKuKyeV/WF2pRg== X-CSE-MsgGUID: zJmBcTWPSqOC/FlSmuLgQw== X-IronPort-AV: E=Sophos;i="6.11,192,1725346800"; d="scan'208";a="32833320" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 10 Oct 2024 02:32:40 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 10 Oct 2024 02:31:44 -0700 Received: from che-lt-i67131.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 10 Oct 2024 02:31:39 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , CC: Manikandan Muralidharan Subject: [PATCH] drm: atmel-hlcdc: bypass LCDC pixel clock divider when using LCDC Generic Clock Date: Thu, 10 Oct 2024 15:01:32 +0530 Message-ID: <20241010093132.235177-1-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241010_023245_843377_41D941EC X-CRM114-Status: GOOD ( 12.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In sam9x7 SoC where XLCDC IP is used,add support to bypass the LCDC pixel clock divider when LCDC Generic clock is enabled.Used to match and drive the panel requested Pixel clock. Signed-off-by: Manikandan Muralidharan Acked-by: Lee Jones --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 8 +++++++- include/linux/mfd/atmel-hlcdc.h | 1 + 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c index 0f7ffb3ced20..c54770cecaa8 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c @@ -146,13 +146,19 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) if (div_low >= 2 && (10 * (prate / div_low - mode_rate) < - (mode_rate - prate / div))) + (mode_rate - prate / div))) { /* * At least 10 times better when using a higher * frequency than requested, instead of a lower. * So, go with that. */ div = div_low; + } else { + if (crtc->dc->desc->is_xlcdc) { + cfg |= ATMEL_XLCDC_CLKBYP; + mask |= ATMEL_XLCDC_CLKBYP; + } + } } cfg |= ATMEL_HLCDC_CLKDIV(div); diff --git a/include/linux/mfd/atmel-hlcdc.h b/include/linux/mfd/atmel-hlcdc.h index 80d675a03b39..982f494e6307 100644 --- a/include/linux/mfd/atmel-hlcdc.h +++ b/include/linux/mfd/atmel-hlcdc.h @@ -44,6 +44,7 @@ #define ATMEL_XLCDC_HEO_UPDATE BIT(3) #define ATMEL_HLCDC_CLKPOL BIT(0) +#define ATMEL_XLCDC_CLKBYP BIT(1) #define ATMEL_HLCDC_CLKSEL BIT(2) #define ATMEL_HLCDC_CLKPWMSEL BIT(3) #define ATMEL_HLCDC_CGDIS(i) BIT(8 + (i))