From patchwork Sun Oct 13 13:25:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 13834021 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C1637CF2576 for ; Sun, 13 Oct 2024 13:42:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=1FJT4N6YPYr+68bgPOsGC1fePM0nYLvrhhupSNVkKyg=; b=PLkUHu5X5EsFhgtPoveoSVvq6J VuR9q28ye6vA1uVc6AdD61sT/B9Ur3MdvrZEPOKJK6iwyGMcWOxi0uEY3fRA5m9hvhsAoL8X6Nqyg LW1qUZZYT2igFRGampdIwVu0RWgsEmyjhRTpXr2WppqR31YXOFPlW0HlRupLSZ012378GG1MJhy/k B/E/orBd/zjUXd4o9m4UttxYVwS80MHmRIgUTI+1ZEOWMU2dH7tC7fguxPf/M61+vznCNn69dh+P9 Ac2DnwB5U/Ch9nwO9589xlGJbAhC1XLjboFaITVv7n7dsimZsdjpjBWDyOhHOXeFttVqwii1Z4Zg9 Tq/ee7iw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1szyrj-00000002jgO-1EMw; Sun, 13 Oct 2024 13:42:35 +0000 Received: from nyc.source.kernel.org ([2604:1380:45d1:ec00::3]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1szypl-00000002jOU-0CVS for linux-arm-kernel@lists.infradead.org; Sun, 13 Oct 2024 13:40:34 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id 47D47A40CB6; Sun, 13 Oct 2024 13:40:23 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C3609C4CEC5; Sun, 13 Oct 2024 13:40:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1728826831; bh=J9IpKZ04hrcgz+cG1LHCaociYi/oUK7qDAOHHUpwG9A=; h=From:To:Cc:Subject:Date:From; b=T32xBRYwNuMxLQYDzr76eGdiFM0yq0+OPS2Xxs4ItUh9Aed+uyhCFaHSmUgMOrSob DNo3unkDjYPNlrwf4tkPxX12fHVRBoM+h67+lCYJn7Vy7IX38n09gtAymTzLj/aSxA 7zc8+Ntd1O02I+xgZdMpWC84eEglTdM/IUzqwui6Y20YXeGH7ZMvtQieGJF6XPH7GD cPJSoufVGOj0pDKNvKUatiKiFlpC/dmKtbHNPSRFI9gaPq/Q2slMqMhR0OhnE8seXp Hhi7KCWcOqx2Fa3ixzT201y3EGwAh+0a/8ZJGcBSm/HZiF1EdWz1KttRRdF3uu1oeo YjW9/Z/qeRtfA== From: Jisheng Zhang To: Russell King , Vladimir Murzin Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] ARM: NOMMU: Fix exc_ret for stack frame type Date: Sun, 13 Oct 2024 21:25:20 +0800 Message-ID: <20241013132520.2848-1-jszhang@kernel.org> X-Mailer: git-send-email 2.45.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241013_064033_174164_22EB2AF2 X-CRM114-Status: GOOD ( 10.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org commit 72cd4064fcca ("ARM: 8830/1: NOMMU: Toggle only bits in EXC_RETURN we are really care of") only sets BIT[3] for Thread mode and BIT[2] for PSP, it leaves BIT[4] untouched. But there's such a case: the pre-linux env makes use of FPU then the BIT[4] in 'lr' is cleared, this brings an umatch issue since the NOMMU kernel doesn't support FPU yet. Before the above commit, we hardcode the exc_ret as 0xfffffffd, so the flow works fine. Fix this issue by explicitly set BIT[4] which means using standard stack frame. Fixes: 72cd4064fcca ("ARM: 8830/1: NOMMU: Toggle only bits in EXC_RETURN we are really care of") Signed-off-by: Jisheng Zhang Reviewed-by: Vladimir Murzin --- arch/arm/include/asm/v7m.h | 1 + arch/arm/mm/proc-v7m.S | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/include/asm/v7m.h b/arch/arm/include/asm/v7m.h index 4512f7e1918f..3aea6d3c97ee 100644 --- a/arch/arm/include/asm/v7m.h +++ b/arch/arm/include/asm/v7m.h @@ -51,6 +51,7 @@ */ #define EXC_RET_STACK_MASK 0x00000004 #define EXC_RET_THREADMODE_PROCESSSTACK (3 << 2) +#define EXC_RET_FTYPE (1 << 4) /* Cache related definitions */ diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S index ed7781c84341..fdae077d2654 100644 --- a/arch/arm/mm/proc-v7m.S +++ b/arch/arm/mm/proc-v7m.S @@ -138,6 +138,7 @@ __v7m_setup_cont: 1: cpsid i /* Calculate exc_ret */ orr r10, lr, #EXC_RET_THREADMODE_PROCESSSTACK + orr r10, #EXC_RET_FTYPE ldmia sp, {r0-r3, r12} str r5, [r12, #11 * 4] @ restore the original SVC vector entry mov lr, r6 @ restore LR