@@ -267,6 +267,40 @@ static int sparx5_set_target_dt(struct sparx5 *sparx5)
return 0;
}
+static void sparx5_init_features(struct sparx5 *sparx5)
+{
+ switch (sparx5->target_dt) {
+ case SPX5_TARGET_CT_7546:
+ case SPX5_TARGET_CT_7549:
+ case SPX5_TARGET_CT_7552:
+ case SPX5_TARGET_CT_7556:
+ case SPX5_TARGET_CT_7558:
+ case SPX5_TARGET_CT_7546TSN:
+ case SPX5_TARGET_CT_7549TSN:
+ case SPX5_TARGET_CT_7552TSN:
+ case SPX5_TARGET_CT_7556TSN:
+ case SPX5_TARGET_CT_7558TSN:
+ case SPX5_TARGET_CT_LAN9691VAO:
+ case SPX5_TARGET_CT_LAN9694TSN:
+ case SPX5_TARGET_CT_LAN9694RED:
+ case SPX5_TARGET_CT_LAN9692VAO:
+ case SPX5_TARGET_CT_LAN9696TSN:
+ case SPX5_TARGET_CT_LAN9696RED:
+ case SPX5_TARGET_CT_LAN9693VAO:
+ case SPX5_TARGET_CT_LAN9698TSN:
+ case SPX5_TARGET_CT_LAN9698RED:
+ sparx5->features = (SPX5_FEATURE_PSFP | SPX5_FEATURE_PTP);
+ break;
+ default:
+ break;
+ }
+}
+
+bool sparx5_has_feature(struct sparx5 *sparx5, enum sparx5_feature feature)
+{
+ return sparx5->features & feature;
+}
+
/* Compare the devicetree target with the chip target.
* Make sure the chip target supports the features and bandwidth requested
* from the devicetree target.
@@ -934,7 +968,8 @@ static int sparx5_start(struct sparx5 *sparx5)
sparx5->xtr_irq = -ENXIO;
}
- if (sparx5->ptp_irq >= 0) {
+ if (sparx5->ptp_irq >= 0 &&
+ sparx5_has_feature(sparx5, SPX5_FEATURE_PTP)) {
err = devm_request_threaded_irq(sparx5->dev, sparx5->ptp_irq,
NULL, ops->ptp_irq_handler,
IRQF_ONESHOT, "sparx5-ptp",
@@ -1088,6 +1123,9 @@ static int mchp_sparx5_probe(struct platform_device *pdev)
if (err)
goto cleanup_config;
+ /* Initialize the features based on the devicetree target */
+ sparx5_init_features(sparx5);
+
/* Initialize Switchcore and internal RAMs */
err = sparx5_init_switchcore(sparx5);
if (err) {
@@ -75,6 +75,11 @@ enum sparx5_cal_bw {
SPX5_CAL_SPEED_12G5 = 7
};
+enum sparx5_feature {
+ SPX5_FEATURE_PSFP = BIT(0),
+ SPX5_FEATURE_PTP = BIT(1),
+};
+
#define SPX5_PORTS 65
#define SPX5_PORTS_ALL 70 /* Total number of ports */
@@ -338,6 +343,7 @@ struct sparx5 {
u32 chip_id;
enum spx5_target_chiptype target_ct;
enum spx5_target_chiptype target_dt; /* target from devicetree */
+ u32 features;
void __iomem *regs[NUM_TARGETS];
int port_count;
struct mutex lock; /* MAC reg lock */
@@ -405,6 +411,7 @@ struct sparx5 {
/* sparx5_main.c */
bool is_sparx5(struct sparx5 *sparx5);
+bool sparx5_has_feature(struct sparx5 *sparx5, enum sparx5_feature feature);
/* sparx5_switchdev.c */
int sparx5_register_notifier_blocks(struct sparx5 *sparx5);
@@ -1284,6 +1284,11 @@ static int sparx5_tc_flower_replace(struct net_device *ndev,
/* Setup PSFP */
if (tc_sg_idx >= 0 || tc_pol_idx >= 0) {
+ if (!sparx5_has_feature(sparx5, SPX5_FEATURE_PSFP)) {
+ err = -EOPNOTSUPP;
+ goto out;
+ }
+
err = sparx5_tc_flower_psfp_setup(sparx5, vrule, tc_sg_idx,
tc_pol_idx, &sg, &fm, &sf);
if (err)