From patchwork Mon Oct 21 18:14:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 13844535 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BFFB6D17123 for ; Mon, 21 Oct 2024 18:18:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=l2J8g9mMAZT3/lCTzSYGrfFC3v5b+JkYZCL71IZOyKM=; b=ObwukhKLJ/rc0O7RnaCkLUWnQ/ lyOH9z2GL1Q8PsVBhJh6k3mcBTJFeeQjDL2TQycHFvvnJ1q3gZi9GZ7nl3Fs2JLpb78/GHwWbuMww /oNjGdbfBWNO7ztmOATHOyU0mMZwp1ttdOSAR6zmx9JJEuzlZO5LqgyIcBKCUQHs3myvcujdzC3xi yyEFn9ElD4zL9Kxt8QFm/s/4jkLIMWtvN9cHXhh3qMEKqoAjelhSpMN69KZDnJ5P3KKGCzozGiEtQ R4MGBjyH+swKXhvWyvprjiuDCaYr/BMyjVYIN2QofLvqPaPUKlzKoLDo6Vu4LAvdFHvEfPzEdwfYq HtqEMOQA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t2wzA-00000008He8-1FvC; Mon, 21 Oct 2024 18:18:32 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t2wvS-00000008H9f-11Nd for linux-arm-kernel@lists.infradead.org; Mon, 21 Oct 2024 18:14:43 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 4844C5C4672; Mon, 21 Oct 2024 18:14:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 708F4C4CEC3; Mon, 21 Oct 2024 18:14:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1729534480; bh=Kl5tVxl8qYANnVpLWO7nEiJyHaPidpv8qU5ilno6mVI=; h=From:To:Cc:Subject:Date:From; b=gIl+DF+SHiDp336BQrrQVE70piZ2lUrAhYb0JuOYLvCquJx7J+SO1dCJkgFZK2r/q xZY1TZP5kcCl6JA37Pkpp6JBTnTnDhnD0xoyDGBBB1F5w+HSjigYvs2LZDZKUursTX 1mR8JxXZ2BoQUdkmLzHqLaFTwtpeLAgtku3fR91jyPsH1EslzC062XSEi4femOrVo2 yShzIBATTF4jnLmoCFG4PpOCZdJGVxJUzHDhrI2xfFisdrLcbvmTm+5FexqpQS3X70 x1vnq5Eqmote+qUbCxV35sg1cEjZnmqNbVVjC3CMSy8jbElflsoxN+cjbmKaNCrHk6 Q3Ra3Jk1XvISg== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1t2wvN-005WM0-Uk; Mon, 21 Oct 2024 19:14:38 +0100 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev Cc: Will Deacon , Catalin Marinas , Oliver Upton Subject: [PATCH] arm64: Add command-line override for ID_AA64MMFR0_EL1.ECV Date: Mon, 21 Oct 2024 19:14:34 +0100 Message-Id: <20241021181434.1052974-1-maz@kernel.org> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, will@kernel.org, catalin.marinas@arm.com, oliver.upton@linux.dev X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241021_111442_352841_355641E8 X-CRM114-Status: GOOD ( 14.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org It appears that relatively popular hardware out there implements the CNTPOFF_EL2 variant of FEAT_ECV, advertises it via ID_AA64MMFR0_EL1, but cannot be bothered to set SCR_EL3.ECVEn to 1. You would probably think that "this is fine, EL3 will take the trap on access to CNTPOFF_EL2 and flip the ECVEn bit", as that's what a semi-decent firmware implementation would do. But no. None of that. This particular implementation takes the trap, considers its purpose in life, decides that it has none, and *RESETS* the system. Yes, x1e001de, I'm talking about you. In order to allow this machine to be promoted slightly above the level of a glorified door-stop, add a new "id_aa64mmfr0.ecv" override. allowing the kernel to pretend this option was never there. Signed-off-by: Marc Zyngier --- arch/arm64/kernel/pi/idreg-override.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/kernel/pi/idreg-override.c b/arch/arm64/kernel/pi/idreg-override.c index 29d4b6244a6f6..fbc37b2733e20 100644 --- a/arch/arm64/kernel/pi/idreg-override.c +++ b/arch/arm64/kernel/pi/idreg-override.c @@ -38,6 +38,15 @@ struct ftr_set_desc { #define FIELD(n, s, f) { .name = n, .shift = s, .width = 4, .filter = f } +static const struct ftr_set_desc mmfr0 __prel64_initconst = { + .name = "id_aa64mmfr0", + .override = &id_aa64mmfr0_override, + .fields = { + FIELD("ecv", ID_AA64MMFR0_EL1_ECV_SHIFT, NULL), + {} + }, +}; + static bool __init mmfr1_vh_filter(u64 val) { /* @@ -196,6 +205,7 @@ static const struct ftr_set_desc sw_features __prel64_initconst = { static const PREL64(const struct ftr_set_desc, reg) regs[] __prel64_initconst = { + { &mmfr0 }, { &mmfr1 }, { &mmfr2 }, { &pfr0 },