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AJvYcCWFQBQUQPKl2hjj1lWIbedVB6BU7ceQ0J27naz8tW1WzYtMpnkn7zrjrD/B12iUbCedr+OTpp1MLhrh8y5vyPzQ@lists.infradead.org X-Gm-Message-State: AOJu0Ywza/yFUjOoDPj1ulWGE3d9Wcq21GX37LE5pBXDdkl8/NwKBlLW DIvZkr8IFCyYA+06NwHOj/+FRkeh5e+RnscYLpDmZ4lblz4kL+Rm1xCuWrkup/G0pHHYb7t+i8r SwgLzmA== X-Google-Smtp-Source: AGHT+IFiyt/4iIInAWKLwhqunyPq9QHonJj64kutF9hny1NRpAVPZ5zeWGMGBu5qDtED4tv1AgjC9hWx+3+e X-Received: from rananta-linux.c.googlers.com ([fda3:e722:ac3:cc00:11b:3898:ac11:fac1]) (user=rananta job=sendgmr) by 2002:a05:690c:3582:b0:6e3:2f0b:b595 with SMTP id 00721157ae682-6e5bfd58c16mr738297b3.5.1729558039164; Mon, 21 Oct 2024 17:47:19 -0700 (PDT) Date: Tue, 22 Oct 2024 00:47:10 +0000 In-Reply-To: <20241022004710.1888067-1-rananta@google.com> Mime-Version: 1.0 References: <20241022004710.1888067-1-rananta@google.com> X-Mailer: git-send-email 2.47.0.105.g07ac214952-goog Message-ID: <20241022004710.1888067-4-rananta@google.com> Subject: [kvm-unit-tests PATCH 3/3] arm: fpu: Fix the input/output args for inline asm in fpu.c From: Raghavendra Rao Ananta To: Subhasish Ghosh , Joey Gouly , Andrew Jones Cc: Oliver Upton , Marc Zyngier , Raghavendra Rao Anata , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, kvm@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241021_174721_205392_49AEB909 X-CRM114-Status: GOOD ( 10.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The macros fpu_reg_{read,write} post-increment the '__val' pointer register as a part of 'stp' and 'ldp' instructions. As a result, mark it with "+r" for the compiler to treat it as read-write operand. On the contrary, sve_reg_read() never updates the value of the pointer/register. Hence, mark this as "r" for the compiler to treat it as read-only operand. Without these adjustments, the compiler can potentially perform optimizations over the registers holding the pointers that could lead to data aborts. Fixes: d47d370c8f ("arm: Add test for FPU/SIMD context save/restore") Signed-off-by: Raghavendra Rao Ananta --- arm/fpu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arm/fpu.c b/arm/fpu.c index 587b6ea3..6b0411d3 100644 --- a/arm/fpu.c +++ b/arm/fpu.c @@ -54,7 +54,7 @@ static inline bool arch_collect_entropy(uint64_t *random) "stp q26, q27, [%0], #32\n\t" \ "stp q28, q29, [%0], #32\n\t" \ "stp q30, q31, [%0], #32\n\t" \ - : "=r" (__val) \ + : "+r" (__val) \ : \ : "v0", "v1", "v2", "v3", \ "v4", "v5", "v6", "v7", \ @@ -87,8 +87,8 @@ do { \ "ldp q26, q27, [%0], #32\n\t" \ "ldp q28, q29, [%0], #32\n\t" \ "ldp q30, q31, [%0], #32\n\t" \ + : "+r" (__val) \ : \ - : "r" (__val) \ : "v0", "v1", "v2", "v3", \ "v4", "v5", "v6", "v7", \ "v8", "v9", "v10", "v11", \ @@ -138,8 +138,8 @@ do { \ "str z29, [%0, #29, MUL VL]\n" \ "str z30, [%0, #30, MUL VL]\n" \ "str z31, [%0, #31, MUL VL]\n" \ - : "=r" (__val) \ : \ + : "r" (__val) \ : "z0", "z1", "z2", "z3", \ "z4", "z5", "z6", "z7", \ "z8", "z9", "z10", "z11", \