| Message ID | 20241022144016.27350-2-will@kernel.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | KVM: arm64: Simplify handling of GICv3 hardware with broken SEIS | expand |
On Tue, 22 Oct 2024 15:40:15 +0100, Will Deacon <will@kernel.org> wrote: > > ICC_CTLR_EL1 accesses from a guest are trapped and emulated on systems > with broken SEIS support and without FEAT_GICv3_TDIR. On such systems, > we mask SEIS support in 'kvm_vgic_global_state.ich_vtr_el2' and so the > value of ICC_CTLR_EL1.SEIS visible to the guest is always zero. > > Simplify the ICC_CTLR_EL1 read emulation to return 0 for the SEIS field, > rather than reading an always-zero value from the global state. > > Cc: Marc Zyngier <maz@kernel.org> > Cc: Oliver Upton <oliver.upton@linux.dev> > Signed-off-by: Will Deacon <will@kernel.org> > --- > arch/arm64/kvm/hyp/vgic-v3-sr.c | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/arch/arm64/kvm/hyp/vgic-v3-sr.c b/arch/arm64/kvm/hyp/vgic-v3-sr.c > index 18d4677002b1..3f9741e51d41 100644 > --- a/arch/arm64/kvm/hyp/vgic-v3-sr.c > +++ b/arch/arm64/kvm/hyp/vgic-v3-sr.c > @@ -1012,9 +1012,6 @@ static void __vgic_v3_read_ctlr(struct kvm_vcpu *vcpu, u32 vmcr, int rt) > val = ((vtr >> 29) & 7) << ICC_CTLR_EL1_PRI_BITS_SHIFT; > /* IDbits */ > val |= ((vtr >> 23) & 7) << ICC_CTLR_EL1_ID_BITS_SHIFT; > - /* SEIS */ > - if (kvm_vgic_global_state.ich_vtr_el2 & ICH_VTR_SEIS_MASK) > - val |= BIT(ICC_CTLR_EL1_SEIS_SHIFT); > /* A3V */ > val |= ((vtr >> 21) & 1) << ICC_CTLR_EL1_A3V_SHIFT; > /* EOImode */ Reviewed-by: Marc Zyngier <maz@kernel.org> M.
diff --git a/arch/arm64/kvm/hyp/vgic-v3-sr.c b/arch/arm64/kvm/hyp/vgic-v3-sr.c index 18d4677002b1..3f9741e51d41 100644 --- a/arch/arm64/kvm/hyp/vgic-v3-sr.c +++ b/arch/arm64/kvm/hyp/vgic-v3-sr.c @@ -1012,9 +1012,6 @@ static void __vgic_v3_read_ctlr(struct kvm_vcpu *vcpu, u32 vmcr, int rt) val = ((vtr >> 29) & 7) << ICC_CTLR_EL1_PRI_BITS_SHIFT; /* IDbits */ val |= ((vtr >> 23) & 7) << ICC_CTLR_EL1_ID_BITS_SHIFT; - /* SEIS */ - if (kvm_vgic_global_state.ich_vtr_el2 & ICH_VTR_SEIS_MASK) - val |= BIT(ICC_CTLR_EL1_SEIS_SHIFT); /* A3V */ val |= ((vtr >> 21) & 1) << ICC_CTLR_EL1_A3V_SHIFT; /* EOImode */
ICC_CTLR_EL1 accesses from a guest are trapped and emulated on systems with broken SEIS support and without FEAT_GICv3_TDIR. On such systems, we mask SEIS support in 'kvm_vgic_global_state.ich_vtr_el2' and so the value of ICC_CTLR_EL1.SEIS visible to the guest is always zero. Simplify the ICC_CTLR_EL1 read emulation to return 0 for the SEIS field, rather than reading an always-zero value from the global state. Cc: Marc Zyngier <maz@kernel.org> Cc: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Will Deacon <will@kernel.org> --- arch/arm64/kvm/hyp/vgic-v3-sr.c | 3 --- 1 file changed, 3 deletions(-)