@@ -496,7 +496,7 @@ __fiq_usr:
mov r0, sp @ struct pt_regs *regs
bl handle_fiq_as_nmi
get_thread_info tsk
- restore_user_regs fast = 0, offset = 0
+ restore_user_regs
UNWIND(.fnend )
ENDPROC(__fiq_usr)
@@ -81,7 +81,7 @@ no_work_pending:
#ifdef CONFIG_GCC_PLUGIN_STACKLEAK
bl stackleak_erase_on_task_stack
#endif
- restore_user_regs fast = 0, offset = 0
+ restore_user_regs
ENDPROC(ret_to_user_from_irq)
ENDPROC(ret_to_user)
@@ -290,7 +290,7 @@
.endm
- .macro restore_user_regs, fast = 0, offset = 0
+ .macro restore_user_regs
#if defined(CONFIG_CPU_32v6K) && \
(!defined(CONFIG_CPU_V6) || defined(CONFIG_SMP))
#ifdef CONFIG_CPU_V6
@@ -309,8 +309,8 @@ ALT_UP_B(.L1_\@)
#ifndef CONFIG_THUMB2_KERNEL
@ ARM mode restore
mov r2, sp
- ldr r1, [r2, #\offset + S_PSR] @ get calling cpsr
- ldr lr, [r2, #\offset + S_PC]! @ get pc
+ ldr r1, [r2, S_PSR] @ get calling cpsr
+ ldr lr, [r2, S_PC]! @ get pc
tst r1, #PSR_I_BIT | 0x0f
bne 1f
msr spsr_cxsf, r1 @ save in spsr_svc
@@ -318,31 +318,24 @@ ALT_UP_B(.L1_\@)
@ We must avoid clrex due to Cortex-A15 erratum #830321
strex r1, r2, [r2] @ clear the exclusive monitor
#endif
- .if \fast
- ldmdb r2, {r1 - lr}^ @ get calling r1 - lr
- .else
ldmdb r2, {r0 - lr}^ @ get calling r0 - lr
- .endif
mov r0, r0 @ ARMv5T and earlier require a nop
@ after ldm {}^
- add sp, sp, #\offset + PT_REGS_SIZE
+ add sp, sp, #PT_REGS_SIZE
movs pc, lr @ return & move spsr_svc into cpsr
1: bug "Returning to usermode but unexpected PSR bits set?", \@
#elif defined(CONFIG_CPU_V7M)
@ V7M restore.
@ Note that we don't need to do clrex here as clearing the local
@ monitor is part of the exception entry and exit sequence.
- .if \offset
- add sp, #\offset
- .endif
- v7m_exception_slow_exit ret_r0 = \fast
+ v7m_exception_slow_exit ret_r0 = 0
#else
@ Thumb mode restore
mov r2, sp
- load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr
- ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
- ldr lr, [sp, #\offset + S_PC] @ get pc
- add sp, sp, #\offset + S_SP
+ load_user_sp_lr r2, r3, S_SP @ calling sp, lr
+ ldr r1, [sp, S_PSR] @ get calling cpsr
+ ldr lr, [sp, S_PC] @ get pc
+ add sp, sp, S_SP
tst r1, #PSR_I_BIT | 0x0f
bne 1f
msr spsr_cxsf, r1 @ save in spsr_svc
@@ -350,11 +343,7 @@ ALT_UP_B(.L1_\@)
@ We must avoid clrex due to Cortex-A15 erratum #830321
strex r1, r2, [sp] @ clear the exclusive monitor
- .if \fast
- ldmdb sp, {r1 - r12} @ get calling r1 - r12
- .else
ldmdb sp, {r0 - r12} @ get calling r0 - r12
- .endif
add sp, sp, #PT_REGS_SIZE - S_SP
movs pc, lr @ return & move spsr_svc into cpsr
1: bug "Returning to usermode but unexpected PSR bits set?", \@
Now all remaining invocations of restore_user_regs has fast = 0 and offset = 0 set, so drop these parameters to the macro. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- arch/arm/kernel/entry-armv.S | 2 +- arch/arm/kernel/entry-common.S | 2 +- arch/arm/kernel/entry-header.S | 29 +++++++++-------------------- 3 files changed, 11 insertions(+), 22 deletions(-)