| Message ID | 20241029152420.3251097-1-arnd@kernel.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | perf/arm_pmuv3: fix building on 32-bit | expand |
On Tue, Oct 29, 2024 at 03:24:10PM +0000, Arnd Bergmann wrote: > From: Arnd Bergmann <arnd@arndb.de> > > The write_pmuacr() function is only defined on arm64, so building the > driver on 32-bit arm now fails: > > drivers/perf/arm_pmuv3.c: In function 'armv8pmu_enable_user_access': > drivers/perf/arm_pmuv3.c:784:17: error: implicit declaration of function 'write_pmuacr'; did you mean 'write_pmcr'? [-Wimplicit-function-declaration] > > Add a compile-time check around the newly added code, as it is never > needed on arm32. > > Fixes: 0bbff9ed8165 ("perf/arm_pmuv3: Add PMUv3.9 per counter EL0 access control") > Signed-off-by: Arnd Bergmann <arnd@arndb.de> > --- > drivers/perf/arm_pmuv3.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) Cheers, Arnd. Rob already sent a fix for this [1], which I'll push out shortly. Will [1] https://lore.kernel.org/linux-arm-kernel/20241029120602.4061566-2-robh@kernel.org/
diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c index b6315ce71f19..e67918e0bbda 100644 --- a/drivers/perf/arm_pmuv3.c +++ b/drivers/perf/arm_pmuv3.c @@ -775,6 +775,7 @@ static void armv8pmu_enable_user_access(struct arm_pmu *cpu_pmu) int i; struct pmu_hw_events *cpuc = this_cpu_ptr(cpu_pmu->hw_events); +#ifdef CONFIG_ARM64 if (is_pmuv3p9(cpu_pmu->pmuver)) { u64 mask = 0; for_each_set_bit(i, cpuc->used_mask, ARMPMU_MAX_HWEVENTS) { @@ -782,7 +783,9 @@ static void armv8pmu_enable_user_access(struct arm_pmu *cpu_pmu) mask |= BIT(i); } write_pmuacr(mask); - } else { + } else +#endif + { /* Clear any unused counters to avoid leaking their contents */ for_each_andnot_bit(i, cpu_pmu->cntr_mask, cpuc->used_mask, ARMPMU_MAX_HWEVENTS) {