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Wed, 30 Oct 2024 03:18:40 -0700 (PDT) Date: Wed, 30 Oct 2024 11:18:10 +0100 In-Reply-To: <20241030101803.2037606-10-ardb+git@google.com> Mime-Version: 1.0 References: <20241030101803.2037606-10-ardb+git@google.com> X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-Developer-Signature: v=1; a=openpgp-sha256; l=2475; i=ardb@kernel.org; h=from:subject; bh=Q+pr1M8F6H61P9kQUTYPtb4597ihTA9POIZzPdbOGKE=; b=owGbwMvMwCFmkMcZplerG8N4Wi2JIV2J/cmzb6dbs+SaWnIUZB/uT8gUOpxzjIG1YddKuaiuk sfN6RYdpSwMYhwMsmKKLAKz/77beXqiVK3zLFmYOaxMIEMYuDgFYCJ2Ygz/q+wZnv75ufDFJvWD qfadKiGbXXv/HmTTSDMrcsyLDosUYfgfwS7VxLaaoezGeqaXZYZdormWnUv+OjDG3jZ7v3l6+Td uAA== X-Mailer: git-send-email 2.47.0.163.g1226f6d8fa-goog Message-ID: <20241030101803.2037606-16-ardb+git@google.com> Subject: [RFC PATCH 6/8] arm64/Kconfig: Drop support for 48-bit virtual addressing From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Ard Biesheuvel , Catalin Marinas , Will Deacon , Marc Zyngier , Mark Rutland , Ryan Roberts , Anshuman Khandual , Kees Cook X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241030_031842_971978_EB2D59DC X-CRM114-Status: GOOD ( 12.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ard Biesheuvel Drop support for 48-bit virtual addressing on 16k pages, which is the only remaining config that supports this explicitly. On 16k pages, 48-bit virtual addressing uses 4 levels of translation, where the top level has only 2 entries. This is very inefficient in terms of TLB utilization, and so 47-bit virtual addressing is usually a better choice. Note that x86 supports only 47-bit virtual addressing for user space with 4 translation levels, due to the way its page tables are constructed (a single combined root table for both kernel and user space), and so removing this configuration is unlikely to create portability concerns. Signed-off-by: Ard Biesheuvel --- arch/arm64/Kconfig | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 7df7d24c767d..39d0d2eb5b7c 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -410,12 +410,12 @@ config BUILTIN_RETURN_ADDRESS_STRIPS_PAC config KASAN_SHADOW_OFFSET hex depends on KASAN_GENERIC || KASAN_SW_TAGS - default 0xdfff800000000000 if (ARM64_VA_BITS_48 || (ARM64_VA_BITS_52 && !ARM64_16K_PAGES)) && !KASAN_SW_TAGS + default 0xdfff800000000000 if ARM64_VA_BITS_52 && !ARM64_16K_PAGES && !KASAN_SW_TAGS default 0xdfffc00000000000 if ARM64_VA_BITS_52 && ARM64_16K_PAGES && !KASAN_SW_TAGS default 0xdffffe0000000000 if ARM64_VA_BITS_42 && !KASAN_SW_TAGS default 0xdfffffc000000000 if ARM64_VA_BITS_39 && !KASAN_SW_TAGS default 0xdffffff800000000 if ARM64_VA_BITS_36 && !KASAN_SW_TAGS - default 0xefff800000000000 if (ARM64_VA_BITS_48 || (ARM64_VA_BITS_52 && !ARM64_16K_PAGES)) && KASAN_SW_TAGS + default 0xefff800000000000 if ARM64_VA_BITS_52 && !ARM64_16K_PAGES && KASAN_SW_TAGS default 0xefffc00000000000 if ARM64_VA_BITS_52 && ARM64_16K_PAGES && KASAN_SW_TAGS default 0xeffffe0000000000 if ARM64_VA_BITS_42 && KASAN_SW_TAGS default 0xefffffc000000000 if ARM64_VA_BITS_39 && KASAN_SW_TAGS @@ -1353,10 +1353,6 @@ config ARM64_VA_BITS_42 bool "42-bit" depends on PAGE_SIZE_64KB -config ARM64_VA_BITS_48 - bool "48-bit" - depends on PAGE_SIZE_16KB - config ARM64_VA_BITS_52 bool "52-bit" help @@ -1392,7 +1388,6 @@ config ARM64_VA_BITS default 36 if ARM64_VA_BITS_36 default 39 if ARM64_VA_BITS_39 default 42 if ARM64_VA_BITS_42 - default 48 if ARM64_VA_BITS_48 default 52 if ARM64_VA_BITS_52 choice