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Thu, 31 Oct 2024 07:21:34 -0700 From: Besar Wicaksono To: , , , , CC: , , , , , , , , , Besar Wicaksono Subject: [PATCH v2 2/4] perf: arm_cspmu: nvidia: fix sysfs path in the kernel doc Date: Thu, 31 Oct 2024 14:21:16 +0000 Message-ID: <20241031142118.1865965-3-bwicaksono@nvidia.com> X-Mailer: git-send-email 2.46.1 In-Reply-To: <20241031142118.1865965-1-bwicaksono@nvidia.com> References: <20241031142118.1865965-1-bwicaksono@nvidia.com> MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH2PEPF0000013F:EE_|CY5PR12MB6276:EE_ X-MS-Office365-Filtering-Correlation-Id: 8fc40070-4bec-4459-1902-08dcf9b76109 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: KG3qXw0CXYvb4H+Fb3y1fU19ua/F3CnsX7eVcZwH1YB6BkIK0eVmF2CnzRoGYDMuYGeOM8vrYZJ0gJoQtUcuul7D62JSfQmbGSqRFwtD6SunZIQhEzdG1tsx8ARH+YwqTzUMhHMzp06Mv77D40gkF2yV/FfR1VUIdpJ6o1rNZPv5tYzAl5oG9SVhqU0ZtFCHLeEwpLdOH/bqrSXCR9Xk7zlTSli9sS1Hjw8whq3Z6p1JgxHMvyq/h+F/aTUb6X2zpIEDpaQfBYeKF5My4y8uQkA6vWCEdj7e2OefrhkabIA7N2ewl+rGc4qZj9PwiOMxAgqo6sm/7LKKAUEiLNmBtBH1E88maVrWy+5/QUwJCaVFE+rHD6xPuZGxFxW5/BY7XRq8nWBsJEMrw+Zk4Eayuagb0XmJ90NfA1MahDR0jpTDmIje0VjO/snntdDk+ke8+4fGrkZb3k4yWOO5XFAUl8Fsma4dryNttoWZPJYF/kPEnIc3PVt5p4I4xkm1LabX+7OWjsWLz7NSNY5wtpuKvmabIVtTVqpQiwp8JQ1V/mIR3TmtmZYd7mXtlvPWt0xRJeUjggHT1FKtIu63EFvOe5PBdL6BsdFqo4L/mbltdMVvqrX3z3RJMiX23m8ekjxcDJFJoRdwb0j9clPPfkpASUdFSCqEFuJzxmw/R5doHfJdTz8iJtFzDqnLx6/4sjZxi2Oo02g3GoSXOqqyHqReZX+DenJ63HHz0oFTBz6fhAeGh23ecgUnvIz49o/5QzqneQPDcnUJQzbVc+DR5VMaoAPSVHMABRaO65SttlAlaRxwI5eiIOG58f14pJvkf++KatdeVOLqaR7czKfDkxmsMzGCaC9aOd3VRgO76mDkKvOqgEOa0BXWoc6LgeccH/OPx7Va0dcT+N1XYlVv1dIveSx6CGHqhFq1oTxBQzr+c3D/LSGpvWu0eRChx7CiKbvEWZ5fasDFUy94WQPMV0SgF0wiAJXn04I8DIKnWYFEU+g0BcfN+nJWRrIW3hHQQ6Bmj7+bftfgfd7kCjCuVmR/jcxLs9wKdog253d3DEJwbe+R8b7PzJn3t64r5+aLY8F1ZdwgYw7R4i3xWuiOkRPpDK6H9zbqsXw4ziJIttkbLyAe8S4MfrrCYrxBK+pLDVaIqIzrNL3S7dIj4LLDurSbcA4SKhNdDCAAw7IRQyPyrAl0zH+8J/pmczmUUTbwtQc5pm7wuHya0KXe9y76bTbltCgArHVaXfsJq3SAmYPyeG4VcSu7K7Ot3YbJSknYXpHBt6rOfdncxqPyDzS4HKDW79XzzYk0eqMd0kZXh8E9XSR+xEBWXA/R6Wz+9DdstPG8Nb5xdGZz8354nKJON0RYrM3nq0fEyPMwTyJwAshYMMCoR2nCvSgrY3UKlOFAKk1kaRyJE9fRi/dGDtJ4g3j1SQ== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(36860700013)(82310400026)(1800799024);DIR:OUT;SFP:1101; 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Signed-off-by: Besar Wicaksono --- Documentation/admin-guide/perf/nvidia-pmu.rst | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/Documentation/admin-guide/perf/nvidia-pmu.rst b/Documentation/admin-guide/perf/nvidia-pmu.rst index 2e0d47cfe7ea..6e8ee0fcf471 100644 --- a/Documentation/admin-guide/perf/nvidia-pmu.rst +++ b/Documentation/admin-guide/perf/nvidia-pmu.rst @@ -34,7 +34,7 @@ strongly-ordered (SO) PCIE write traffic to local/remote memory. Please see traffic coverage. The events and configuration options of this PMU device are described in sysfs, -see /sys/bus/event_sources/devices/nvidia_scf_pmu_. +see /sys/bus/event_source/devices/nvidia_scf_pmu_. Example usage: @@ -66,7 +66,7 @@ Please see :ref:`NVIDIA_Uncore_PMU_Traffic_Coverage_Section` for more info about the PMU traffic coverage. The events and configuration options of this PMU device are described in sysfs, -see /sys/bus/event_sources/devices/nvidia_nvlink_c2c0_pmu_. +see /sys/bus/event_source/devices/nvidia_nvlink_c2c0_pmu_. Example usage: @@ -96,7 +96,7 @@ Please see :ref:`NVIDIA_Uncore_PMU_Traffic_Coverage_Section` for more info about the PMU traffic coverage. The events and configuration options of this PMU device are described in sysfs, -see /sys/bus/event_sources/devices/nvidia_nvlink_c2c1_pmu_. +see /sys/bus/event_source/devices/nvidia_nvlink_c2c1_pmu_. Example usage: @@ -125,13 +125,13 @@ to local memory. For PCIE traffic, this PMU captures read and relaxed ordered for more info about the PMU traffic coverage. The events and configuration options of this PMU device are described in sysfs, -see /sys/bus/event_sources/devices/nvidia_cnvlink_pmu_. +see /sys/bus/event_source/devices/nvidia_cnvlink_pmu_. Each SoC socket can be connected to one or more sockets via CNVLink. The user can use "rem_socket" bitmap parameter to select the remote socket(s) to monitor. Each bit represents the socket number, e.g. "rem_socket=0xE" corresponds to socket 1 to 3. -/sys/bus/event_sources/devices/nvidia_cnvlink_pmu_/format/rem_socket +/sys/bus/event_source/devices/nvidia_cnvlink_pmu_/format/rem_socket shows the valid bits that can be set in the "rem_socket" parameter. The PMU can not distinguish the remote traffic initiator, therefore it does not @@ -165,12 +165,12 @@ local/remote memory. Please see :ref:`NVIDIA_Uncore_PMU_Traffic_Coverage_Section for more info about the PMU traffic coverage. The events and configuration options of this PMU device are described in sysfs, -see /sys/bus/event_sources/devices/nvidia_pcie_pmu_. +see /sys/bus/event_source/devices/nvidia_pcie_pmu_. Each SoC socket can support multiple root ports. The user can use "root_port" bitmap parameter to select the port(s) to monitor, i.e. "root_port=0xF" corresponds to root port 0 to 3. -/sys/bus/event_sources/devices/nvidia_pcie_pmu_/format/root_port +/sys/bus/event_source/devices/nvidia_pcie_pmu_/format/root_port shows the valid bits that can be set in the "root_port" parameter. Example usage: