From patchwork Fri Nov 1 08:06:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrei Stefanescu X-Patchwork-Id: 13858893 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 056CEE674B5 for ; Fri, 1 Nov 2024 08:15:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:MIME-Version: Content-Transfer-Encoding:Content-Type:References:In-Reply-To:Message-ID:Date :Subject:Cc:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=lLib9GtyC9gGrvBWHSgYaXVKTzBImFV2N1cKQg3r+mU=; b=yZ6BdKcNQsef+UVUnqF+bIzq2l e05aF+PAD6+TKUsAOfSJru8XBTAAKFcCNNF8LvtJhIc78LaZYx4hl7+KSSgp+6ixR72LolfwsvbyT H00FfEtftO/DA8ZegKB7OHWiwIVIdXkp/jbKVlKLDPkvM8AYAcCzPKB0rBwHUm3S1JwRoeHfKNGm0 E6G4vi2/wB0uiMpBeSYoANqJPT6WoPR9SwnzdgbUK38gxIloTW7qEEb63gM/TwB7KhTT3uUg9hgn+ lylCmIU+doNbjIifnauVs9tNNo/kDOzGtBQ15obm5JcDm2Idsej5H7mrPdDmgim40VQ7xbrj7P3Ml LCtwpJ2A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t6moQ-00000006EJy-2Wia; Fri, 01 Nov 2024 08:15:18 +0000 Received: from mail-am6eur05on20608.outbound.protection.outlook.com ([2a01:111:f403:2612::608] helo=EUR05-AM6-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t6mgL-00000006Cn6-11um for linux-arm-kernel@lists.infradead.org; Fri, 01 Nov 2024 08:06:58 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=In6RTl1vArjiv9C/64KfK6ch4pibctXupAjaNoWp+fayAqm5uahuN/rSFA8HnVAdU63g2rTh2N+8jRgPTfoOG+EMlkPv3Z8KoCLFzOcAQl9Sv0Mv/pFAvUPuNQFbumZoE3O4hN1tAcdYI9BpeUGHy0DFnK0pZ7M9IFrv1gxlH0Ut45Z1kl56IHVOH3du3uPGt3oWolgAvxW085edbJZh8JN8jbvheRdHJ9CQMZ1YaDU/MUNlOwmvCKx2JhO9SBO/ZcEM/22v3QrxSfM+BtIDj4cIznUDrXSueM/N9zszAIDIdjd71ibYLeRYg5F+fYpkxYBzYDJKopk8fxJ9hXTYMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=lLib9GtyC9gGrvBWHSgYaXVKTzBImFV2N1cKQg3r+mU=; b=HWEGA01g5ocztC2JGscD47Fq0Bh9M1pvGdzBNqOB62ayj0G0o9f9eOU3z9HwERBMJBQMagwn2zCW7bqXBwhqto827XFYyIMDD9hTr/CfiGjbqqfZ/iyx0TFftdTSUHH8rOHNohQtQI3Q+duYB1k/Qg5WpvVtC3oXtJVhgHkqZbhXDyu8WJUuPTLkA1BkGENqrILUTGFXj07lsKZ6dqT5f8dkTTbVM03QTiSOP1LKSEkztIwAsTOxOmNuAbtzdrQUwgzrtb3lVqWJh5QP5teHDKxSxmFwknaazX2xi7b8m2QTHa0Q4NpY9BePxCdPLGzI8lhbIBi0oAgHUrNvrU+61A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com; s=selector1-NXP1-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=lLib9GtyC9gGrvBWHSgYaXVKTzBImFV2N1cKQg3r+mU=; b=w5JhotbSEBqCWbarNzBO7DwpVhl9abVUBF8fgFmgPYXQsiQ6Yi4k2W/9luIa1cnjaOXHf3cpndEC3fXhru+D6zTcyIfd2HO/VNWdIpO/DuzRpdCw60HwNnT2qD6l6uytxLw/V8ap0qy+TpWHc7/KlegpHM8mCUZy/LMlNiG0mzPBaZi9a4dNcBAlv36ZmBuLF60aGZQxQjxSCq8+/5PYFcKKvozJD1A9yN2fNogoOwDNN1OjGOFmDh1OTBmNqwMXw0iH4d4BB/lSNdRkbktstzTaaKJO1RfmE5+/9SzM+xHls02b66S8mwl33156ZwkTYkn/4p/gvrg8YAEKIQuEjA== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=oss.nxp.com; Received: from AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) by AM8PR04MB8034.eurprd04.prod.outlook.com (2603:10a6:20b:249::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8114.20; Fri, 1 Nov 2024 08:06:50 +0000 Received: from AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455]) by AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455%5]) with mapi id 15.20.8114.015; Fri, 1 Nov 2024 08:06:50 +0000 From: Andrei Stefanescu To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , Larisa Grigore , Andrei Stefanescu , Greg Kroah-Hartman , "Rafael J. Wysocki" , Lee Jones , Shawn Guo , Sascha Hauer , Fabio Estevam , Dong Aisheng , Jacky Bai Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP S32 Linux Team , Christophe Lizzi , Alberto Ruiz , Enric Balletbo , Pengutronix Kernel Team , imx@lists.linux.dev Subject: [PATCH v5 4/7] pinctrl: s32: convert the driver into an mfd cell Date: Fri, 1 Nov 2024 10:06:10 +0200 Message-ID: <20241101080614.1070819-5-andrei.stefanescu@oss.nxp.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241101080614.1070819-1-andrei.stefanescu@oss.nxp.com> References: <20241101080614.1070819-1-andrei.stefanescu@oss.nxp.com> X-ClientProxiedBy: AM0PR10CA0115.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:208:e6::32) To AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM9PR04MB8487:EE_|AM8PR04MB8034:EE_ X-MS-Office365-Filtering-Correlation-Id: f3275821-d580-481c-15df-08dcfa4c23a9 X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|52116014|366016|7416014|376014|1800799024|921020|38350700014; X-Microsoft-Antispam-Message-Info: =?utf-8?q?MpOsEibM68YQAkKvtULqpxQnZWCoFPd?= =?utf-8?q?l4DtiTRWVDuxsKKbjkfk9oRc/jqhUdDTNn4u9rtCjojxJ0i9EZdbQQmeVtC4etpbt?= =?utf-8?q?+rQiXug0wOETAMr9Js9qMTATQcJqRpBqSbe5kWKCuWsWLumxjG9y00UkxAzTIBXNL?= =?utf-8?q?leOOcq26xuJ105zl41+x3jLTZXIytTFv5rjmsa2eGZ1OfpKfASr/bcDhpaygNlHPx?= =?utf-8?q?NASYUJYQEqPRPpXmJFugHmuQE2YP+zYmEq6fkXnn7o1blWDqk7DusBtbeT0vk5GuP?= =?utf-8?q?pYXyPvb9nrI+owOVW0f0tEcaBc5I3jTqflSeaGHZ1p30C/Eq/HE4doGIWqBhM8Kod?= =?utf-8?q?qc2979mg4eyuPeriOMWiv8jXqoxP9kVfov8zWHdMvsWPKXpxY4A8dsd2l3SFmqYMv?= =?utf-8?q?tzLCbeFQub0b6HVbQ+1DXilKj0B7Io/kvB7/d8FIty9I21rs70GfrQCtihzeB7uLz?= =?utf-8?q?9hsr5IwxFYLGWFzM3mGP/PAplI8v9+I5E57vvZC1KXWEL5Ok9ezXGSU6+TyGAF0YN?= =?utf-8?q?H/jG6rMNAeRe90kC5OuzwfrZjU9Cul0pVGlebDL2ReGHgn9KM+hSMZgZiibx0aFOi?= =?utf-8?q?zIvg0EvPw5o20c2dMOhNXqNFm13+Y5liIvGlMI6hG3mT2KM1o3VdAsb8yCcu8SVAf?= =?utf-8?q?3U2iz7lNmjCssu//GRteufLNWlvuOeGbj5p7VDHNQecKgNx6D+bkFGY+NxCVGqwEb?= =?utf-8?q?3DQD6H4HhzjhVdMiAzY1RVnBIyQ+lntWrC4rNJa/+8llU76D+IboSOEZAmlF1RsU2?= =?utf-8?q?PgLhd/SV6TzSW0vzIN0O73/1QENnQyP0fTOQBKekCoKc7f+XmFLS9ch+ulG+QOugj?= =?utf-8?q?f7zo5M6PEfqA8ZDuVRhWCPtlUAZxHOMF6AdAn0mX1XOAANvwFzedsW0FcUJEuVYmK?= =?utf-8?q?vD52726ZAiYwtbcaxvZkEkNaK2GaECgVu6Revnhtar59E+/2VShmsNdPxYWtzE3Ic?= =?utf-8?q?B+qKm7yohvV0kJbXlSjAQ9RayGEytUkZq+j2A8u9TWcHZ7nXK7BM8eIWhQZMU9btU?= =?utf-8?q?gEF/MkAFVgaxMC8e4SLwFOfH3BJtWvjVgY62FACfyAd9VKCZ1krYFWIT/Hkjjt0sY?= =?utf-8?q?plclW4wUJa6ILZHzdN73u7KzuDyvEK7amOR2SCIwcDPH03z+HYGDH3i6pmTiRPXGw?= =?utf-8?q?2Lhd3fxI4/VIjaPlHZk309abudyRiv0tIVp8v5wFPGuAi0TxXHr/uL2uLVOAVAlsR?= =?utf-8?q?p6QzMrZl7BF+mzQBXR7MYIwYY6quf9VsZkwRCBHj3u0a5XCUh9VE02+MlDuBxwJOZ?= =?utf-8?q?agX1VTHo87fWwEGmpZm3lKolnT2nz3zDjoCRvXnae16P1myQFmbUJswi4rYDyLnzD?= =?utf-8?q?TAdu3JXEVhSe?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AM9PR04MB8487.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(52116014)(366016)(7416014)(376014)(1800799024)(921020)(38350700014);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?fhW3hz0Z1m+/1NEmc9BDQwIuJnwa?= =?utf-8?q?CxiwhEoHqofF1+03bFGBcdUzhi7PWOTxqmHSTKr6gbPEZlq/dbTnooDj5OPRUOwFw?= =?utf-8?q?4vjrJCv3LIC4+lHN7fccrOfMqlkbYUgTDq3aV8dwBSajmX6ef+RiSb+JGCq0bty5o?= =?utf-8?q?6MQSX/fGFtT9JUrRRT27K/TOaauOmCyl2dduwXli8iWTAWnpxyo6Qr5Q2POFVdAe6?= =?utf-8?q?oUxav0wTGGygjZ3rhGvV4bJlL2jtbfrw25gqIbD9VCRO1geUYqXs/xu+Ysn/giTqo?= =?utf-8?q?shZIntBTXlxm/c5oyhbHmwNKfWXCHpImv3pKa77xstuRocWenssWOhHFCoOHgPcXj?= =?utf-8?q?/JLiukQH7SVIthPzpjER8lEV8wCgn3zMlEn4uJsxK5cFZIMnT9m5UqRRhEWQcgLfd?= =?utf-8?q?oOYzD1Ceac15LAde+9UwUOL+ywWjTi8uAm/jiom9G/Hrx/aVC8+Sws9DLxQ1+leMr?= =?utf-8?q?b9EWfALst7HSIglb/CJzLvig9Ji+5T9Zox5EMRdS31Qc51KF8WOc5BkP6FsLX7hjn?= =?utf-8?q?kjV/GB/+e8WXYzYQM9cVn1XNsx5H12WQtD9rlKPZ3oMTGegXsxAWdICOW/7LEuGrU?= =?utf-8?q?BKhlXuLFGrCWwfT554S6yAJe4j1l1YCBqoZPuk2fQjXR1vTDmHZtvmIeoxPUWNT+y?= =?utf-8?q?KNCKKXkkL3dHw1fsQbm+rAqjurz1NxALcUJ994CTZqxpFkt/qAEETLkpj/TuDRfhj?= =?utf-8?q?0EFXWkuGX3SK5NnctUaftaA9ArsU4PwgCIM3kJ79RFoQKeEO4tePbYmm7U3h1Qxs0?= =?utf-8?q?wMIj4+9ET871MMG1kURgt4Ezai4V8gdzxVQRFbxJWTXd/+MzFsDlPbWrCkbKtaRhc?= =?utf-8?q?M89KubXUJkMLuH8Qb3wBR+g18YrkjTY5aMR/ofXh9wO9VEoHghGh5JOHkBiEmTbPj?= =?utf-8?q?RHnkxnMAWixWo2VUNvnuB2cZ61WDmEedAIWoSNx9UpAJ7tOOUsDpUCmnQW67Z1LKO?= =?utf-8?q?XdTUT63Oxtln4/pJLyg/qttxIxrBZWCtO0WNQkI1in1rSge9vSuMNYhS4B0vunmM9?= =?utf-8?q?2u87qM1OEdnxOw1cHwRndJienEJlOsIfxQyCbuPzu/1tT6189ORLNMDZ5panV2FVp?= =?utf-8?q?tvnppex0+BJDCtJ3/ROjAdwRf0DsE790z0fEDRbjnVYpS8iTdXfK+m6SZYFYE8xxv?= =?utf-8?q?0BAHR7UQUHT9x9ypnEUJIW/j2UNIkd5TeFJxQbb8gbbYIVbhI8iK3/SpbEF5NgFPp?= =?utf-8?q?3hCrQsi7d91qOimNlI+7ji83xKcTiZCmxp9K3RduYFJTlbXYCVUdwjGMqaq9B8s9g?= =?utf-8?q?YL86HQKeVxUE93lYU/Q+xvN5UIeaP+MeoMasXiaY4lWj+4AYc6+TjIa209n8PttcD?= =?utf-8?q?T1No/GWBFdILtC9B7je73Pq5KtzOY/JttbbEx9v2F+UbsicPVtIv5Vqt9dUOxrEjV?= =?utf-8?q?u0RX/+twdX9VeFnILtP6y6E96W3MbtpGVMcdm3QPDxQKEgcg9DB4C6otBwTZX1a7Z?= =?utf-8?q?eAQfUPKVRkEql3evo9IKKdDXr7wO/3hwoOljxgglSHiFcFAC8Z4PPkPypcRNQkR3Q?= =?utf-8?q?x8q6RqwVAirPhOly5weu2SGX7y6dTiKwGg=3D=3D?= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f3275821-d580-481c-15df-08dcfa4c23a9 X-MS-Exchange-CrossTenant-AuthSource: AM9PR04MB8487.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Nov 2024 08:06:50.4006 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: w3QqhiZapPZNU6imVXEKN0cx2KhOZ8fXfznUaDRKU40DIcenRsXLze3XT4QunbAtW5Nmr2gvUkHVDIFEGr8uhzg+OUJwOiVBsIvNnpl5g9s= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR04MB8034 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241101_010657_472751_956C2DC8 X-CRM114-Status: GOOD ( 17.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The SIUL2 module is now represented as an mfd device. The pinctrl driver is now an mfd_cell. Therefore, remove its compatible and adjust its probing in order to get the necessary information from its mfd parent. Signed-off-by: Andrei Stefanescu Acked-by: Linus Walleij --- drivers/pinctrl/nxp/pinctrl-s32.h | 1 + drivers/pinctrl/nxp/pinctrl-s32cc.c | 75 +++++++++++------------------ drivers/pinctrl/nxp/pinctrl-s32g2.c | 23 ++------- 3 files changed, 33 insertions(+), 66 deletions(-) diff --git a/drivers/pinctrl/nxp/pinctrl-s32.h b/drivers/pinctrl/nxp/pinctrl-s32.h index add3c77ddfed..829211741050 100644 --- a/drivers/pinctrl/nxp/pinctrl-s32.h +++ b/drivers/pinctrl/nxp/pinctrl-s32.h @@ -38,6 +38,7 @@ struct s32_pinctrl_soc_data { const struct pinctrl_pin_desc *pins; unsigned int npins; const struct s32_pin_range *mem_pin_ranges; + const struct regmap **regmaps; unsigned int mem_regions; }; diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinctrl-s32cc.c index 501eb296c760..709e823b9c7c 100644 --- a/drivers/pinctrl/nxp/pinctrl-s32cc.c +++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -44,12 +45,6 @@ enum s32_write_type { S32_PINCONF_OVERWRITE, }; -static struct regmap_config s32_regmap_config = { - .reg_bits = 32, - .val_bits = 32, - .reg_stride = 4, -}; - static u32 get_pin_no(u32 pinmux) { return (pinmux & S32_PIN_ID_MASK) >> S32_PIN_ID_SHIFT; @@ -85,14 +80,15 @@ struct s32_pinctrl_context { unsigned int *pads; }; -/* +/** + * struct s32_pinctrl - private driver data * @dev: a pointer back to containing device * @pctl: a pointer to the pinctrl device structure * @regions: reserved memory regions with start/end pin * @info: structure containing information about the pin * @gpio_configs: Saved configurations for GPIO pins * @gpiop_configs_lock: lock for the `gpio_configs` list - * @s32_pinctrl_context: Configuration saved over system sleep + * @saved_context: Configuration saved over system sleep */ struct s32_pinctrl { struct device *dev; @@ -123,14 +119,13 @@ s32_get_region(struct pinctrl_dev *pctldev, unsigned int pin) return NULL; } -static inline int s32_check_pin(struct pinctrl_dev *pctldev, - unsigned int pin) +static int s32_check_pin(struct pinctrl_dev *pctldev, unsigned int pin) { return s32_get_region(pctldev, pin) ? 0 : -EINVAL; } -static inline int s32_regmap_read(struct pinctrl_dev *pctldev, - unsigned int pin, unsigned int *val) +static int s32_regmap_read(struct pinctrl_dev *pctldev, unsigned int pin, + unsigned int *val) { struct s32_pinctrl_mem_region *region; unsigned int offset; @@ -145,7 +140,7 @@ static inline int s32_regmap_read(struct pinctrl_dev *pctldev, return regmap_read(region->map, offset, val); } -static inline int s32_regmap_write(struct pinctrl_dev *pctldev, +static int s32_regmap_write(struct pinctrl_dev *pctldev, unsigned int pin, unsigned int val) { @@ -163,7 +158,7 @@ static inline int s32_regmap_write(struct pinctrl_dev *pctldev, } -static inline int s32_regmap_update(struct pinctrl_dev *pctldev, unsigned int pin, +static int s32_regmap_update(struct pinctrl_dev *pctldev, unsigned int pin, unsigned int mask, unsigned int val) { struct s32_pinctrl_mem_region *region; @@ -475,8 +470,8 @@ static int s32_get_slew_regval(int arg) return -EINVAL; } -static inline void s32_pin_set_pull(enum pin_config_param param, - unsigned int *mask, unsigned int *config) +static void s32_pin_set_pull(enum pin_config_param param, + unsigned int *mask, unsigned int *config) { switch (param) { case PIN_CONFIG_BIAS_DISABLE: @@ -838,20 +833,21 @@ static int s32_pinctrl_parse_functions(struct device_node *np, static int s32_pinctrl_probe_dt(struct platform_device *pdev, struct s32_pinctrl *ipctl) { + struct nxp_siul2_mfd *mfd = dev_get_drvdata(pdev->dev.parent); struct s32_pinctrl_soc_info *info = ipctl->info; - struct device_node *np = pdev->dev.of_node; - struct resource *res; - struct regmap *map; - void __iomem *base; - unsigned int mem_regions = info->soc_data->mem_regions; + unsigned int mem_regions; + struct device_node *np; + u32 nfuncs = 0, i = 0, j; + u8 regmap_type; int ret; - u32 nfuncs = 0; - u32 i = 0; + np = pdev->dev.parent->of_node; if (!np) return -ENODEV; - if (mem_regions == 0 || mem_regions >= 10000) { + /* one MSCR and one IMCR region per SIUL2 module */ + mem_regions = info->soc_data->mem_regions; + if (mem_regions != mfd->num_siul2 * 2) { dev_err(&pdev->dev, "mem_regions is invalid: %u\n", mem_regions); return -EINVAL; } @@ -861,26 +857,11 @@ static int s32_pinctrl_probe_dt(struct platform_device *pdev, if (!ipctl->regions) return -ENOMEM; + /* Order is MSCR regions first, then IMCR ones */ for (i = 0; i < mem_regions; i++) { - base = devm_platform_get_and_ioremap_resource(pdev, i, &res); - if (IS_ERR(base)) - return PTR_ERR(base); - - snprintf(ipctl->regions[i].name, - sizeof(ipctl->regions[i].name), "map%u", i); - - s32_regmap_config.name = ipctl->regions[i].name; - s32_regmap_config.max_register = resource_size(res) - - s32_regmap_config.reg_stride; - - map = devm_regmap_init_mmio(&pdev->dev, base, - &s32_regmap_config); - if (IS_ERR(map)) { - dev_err(&pdev->dev, "Failed to init regmap[%u]\n", i); - return PTR_ERR(map); - } - - ipctl->regions[i].map = map; + regmap_type = i < mem_regions / 2 ? SIUL2_MSCR : SIUL2_IMCR; + j = i % mfd->num_siul2; + ipctl->regions[i].map = mfd->siul2[j].regmaps[regmap_type]; ipctl->regions[i].pin_range = &info->soc_data->mem_pin_ranges[i]; } @@ -918,13 +899,13 @@ static int s32_pinctrl_probe_dt(struct platform_device *pdev, int s32_pinctrl_probe(struct platform_device *pdev, const struct s32_pinctrl_soc_data *soc_data) { - struct s32_pinctrl *ipctl; - int ret; - struct pinctrl_desc *s32_pinctrl_desc; - struct s32_pinctrl_soc_info *info; #ifdef CONFIG_PM_SLEEP struct s32_pinctrl_context *saved_context; #endif + struct pinctrl_desc *s32_pinctrl_desc; + struct s32_pinctrl_soc_info *info; + struct s32_pinctrl *ipctl; + int ret; if (!soc_data || !soc_data->pins || !soc_data->npins) { dev_err(&pdev->dev, "wrong pinctrl info\n"); diff --git a/drivers/pinctrl/nxp/pinctrl-s32g2.c b/drivers/pinctrl/nxp/pinctrl-s32g2.c index 440ff1879424..9c7fe545cc85 100644 --- a/drivers/pinctrl/nxp/pinctrl-s32g2.c +++ b/drivers/pinctrl/nxp/pinctrl-s32g2.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -713,12 +714,10 @@ static const struct pinctrl_pin_desc s32_pinctrl_pads_siul2[] = { static const struct s32_pin_range s32_pin_ranges_siul2[] = { /* MSCR pin ID ranges */ S32_PIN_RANGE(0, 101), - S32_PIN_RANGE(112, 122), - S32_PIN_RANGE(144, 190), + S32_PIN_RANGE(112, 190), /* IMCR pin ID ranges */ S32_PIN_RANGE(512, 595), - S32_PIN_RANGE(631, 909), - S32_PIN_RANGE(942, 1007), + S32_PIN_RANGE(631, 1007), }; static const struct s32_pinctrl_soc_data s32_pinctrl_data = { @@ -728,22 +727,9 @@ static const struct s32_pinctrl_soc_data s32_pinctrl_data = { .mem_regions = ARRAY_SIZE(s32_pin_ranges_siul2), }; -static const struct of_device_id s32_pinctrl_of_match[] = { - { - .compatible = "nxp,s32g2-siul2-pinctrl", - .data = &s32_pinctrl_data, - }, - { /* sentinel */ } -}; -MODULE_DEVICE_TABLE(of, s32_pinctrl_of_match); - static int s32g_pinctrl_probe(struct platform_device *pdev) { - const struct s32_pinctrl_soc_data *soc_data; - - soc_data = of_device_get_match_data(&pdev->dev); - - return s32_pinctrl_probe(pdev, soc_data); + return s32_pinctrl_probe(pdev, &s32_pinctrl_data); } static const struct dev_pm_ops s32g_pinctrl_pm_ops = { @@ -753,7 +739,6 @@ static const struct dev_pm_ops s32g_pinctrl_pm_ops = { static struct platform_driver s32g_pinctrl_driver = { .driver = { .name = "s32g-siul2-pinctrl", - .of_match_table = s32_pinctrl_of_match, .pm = pm_sleep_ptr(&s32g_pinctrl_pm_ops), .suppress_bind_attrs = true, },