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h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=TypZg6pLeCaSBoINbmBXk6UDfJHSDQ1MZdeHPE6ZxZYBdmGzk8phSSCuS817Zi3iv yme7W9KturW9EgdfJdbd+hwqI3Lq+3GcHyp/9Ns6XwhBBVlVSs1iCsI2X5Ou3ArTQs RM5JXDXIM7ecSswuxkdf7Tr/exVtrQoRQeBY2OVIjbVXmSOXWGBBZKziQMthmja6y4 8UQY0Rqn/Pi4eWnyPc9T/qzIA3eZoWtJiNwNe8gaetfgneqeLdYj2xEOCHFwntKV7+ JJOBptxJksr9ZhF4zLWuvCZVHiitsfFbEJ67yC4X2zA6IZT7Y4JoMqX9ZualujhNvc 0quTWQFWNp/8g== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id BAC03D41C00; Wed, 13 Nov 2024 09:37:35 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Wed, 13 Nov 2024 17:37:29 +0800 Subject: [PATCH v7 2/5] dt-bindings: pinctrl: Add support for Amlogic A4 SoCs MIME-Version: 1.0 Message-Id: <20241113-a4_pinctrl-v7-2-0546a20c1c22@amlogic.com> References: <20241113-a4_pinctrl-v7-0-0546a20c1c22@amlogic.com> In-Reply-To: <20241113-a4_pinctrl-v7-0-0546a20c1c22@amlogic.com> To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Bartosz Golaszewski Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Xianwei Zhao X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1731490653; l=4207; i=xianwei.zhao@amlogic.com; s=20231208; h=from:subject:message-id; bh=E8gcBsM6qojqj57hTy/vqLumXN1IUp3FUay7hZlvU14=; b=6g8W/fNaZ8PbmBSC3DbFf1TECvck9xVkg2eXOLWcM81cH+8yNpEH4njg3QQWAv+2GitlgLlVu tkOjeb49ionCc/xBLYfShpBF6tq1Q+0z0MEIEsVm54NUiSIYQmz5w5o X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=o4fDH8ZXL6xQg5h17eNzRljf6pwZHWWjqcOSsj3dW24= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20231208 with auth_id=107 X-Original-From: Xianwei Zhao X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241113_093741_677107_D8829590 X-CRM114-Status: GOOD ( 11.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: xianwei.zhao@amlogic.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Xianwei Zhao Add the dt-bindings for Amlogic A4 pin controller, and add a new dt-binding header file which document the GPIO bank names of all Amlogic subsequent SoCs. Acked-by: Rob Herring (Arm) Signed-off-by: Xianwei Zhao --- .../bindings/pinctrl/amlogic,meson-pinctrl-a4.yaml | 82 ++++++++++++++++++++++ include/dt-bindings/gpio/amlogic-gpio.h | 45 ++++++++++++ 2 files changed, 127 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a4.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a4.yaml new file mode 100644 index 000000000000..357e9bb079eb --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a4.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/amlogic,meson-pinctrl-a4.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic A4 pinmux controller + +maintainers: + - Neil Armstrong + - Xianwei Zhao + +allOf: + - $ref: amlogic,meson-pinctrl-common.yaml# + +properties: + compatible: + enum: + - amlogic,a4-aobus-pinctrl + - amlogic,a4-periphs-pinctrl + +required: + - compatible + +patternProperties: + "^bank@[0-9a-f]+$": + $ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-gpio + + unevaluatedProperties: false + + properties: + reg: + maxItems: 2 + + reg-names: + items: + - const: mux + - const: gpio + + gpio-controller: true + + "#gpio-cells": + const: 3 + + gpio-line-names: + minItems: 8 + maxItems: 73 + +unevaluatedProperties: + type: object + $ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-pins + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + + periphs_pinctrl: pinctrl@4000 { + compatible = "amlogic,a4-periphs-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0x4000 0x0 0x02e0>; + + bank@0 { + reg = <0x0 0x0 0x0 0x0050>, + <0x0 0xc0 0x0 0x0220>; + reg-names = "mux", "gpio"; + gpio-controller; + #gpio-cells = <3>; + gpio-ranges = <&periphs_pinctrl 0 0 73>; + }; + + cec_ao_a_h_pins: cec_ao_a_h { + mux { + groups = "cec_ao_a_h"; + function = "cec_ao_a_h"; + bias-disable; + }; + }; + }; + }; diff --git a/include/dt-bindings/gpio/amlogic-gpio.h b/include/dt-bindings/gpio/amlogic-gpio.h new file mode 100644 index 000000000000..5bfdb39eeda8 --- /dev/null +++ b/include/dt-bindings/gpio/amlogic-gpio.h @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ +/* + * Copyright (c) 2024 Amlogic, Inc. All rights reserved. + * Author: Xianwei Zhao + */ + +#ifndef _DT_BINDINGS_AMLOGIC_GPIO_H +#define _DT_BINDINGS_AMLOGIC_GPIO_H + +#include + +/* Normal GPIO bank */ +#define AMLOGIC_GPIO_A 0 +#define AMLOGIC_GPIO_B 1 +#define AMLOGIC_GPIO_C 2 +#define AMLOGIC_GPIO_D 3 +#define AMLOGIC_GPIO_E 4 +#define AMLOGIC_GPIO_F 5 +#define AMLOGIC_GPIO_G 6 +#define AMLOGIC_GPIO_H 7 +#define AMLOGIC_GPIO_I 8 +#define AMLOGIC_GPIO_J 9 +#define AMLOGIC_GPIO_K 10 +#define AMLOGIC_GPIO_L 11 +#define AMLOGIC_GPIO_M 12 +#define AMLOGIC_GPIO_N 13 +#define AMLOGIC_GPIO_O 14 +#define AMLOGIC_GPIO_P 15 +#define AMLOGIC_GPIO_Q 16 +#define AMLOGIC_GPIO_R 17 +#define AMLOGIC_GPIO_S 18 +#define AMLOGIC_GPIO_T 19 +#define AMLOGIC_GPIO_U 20 +#define AMLOGIC_GPIO_V 21 +#define AMLOGIC_GPIO_W 22 +#define AMLOGIC_GPIO_X 23 +#define AMLOGIC_GPIO_Y 24 +#define AMLOGIC_GPIO_Z 25 +/* Special GPIO bank */ +#define AMLOGIC_GPIO_DV 26 +#define AMLOGIC_GPIO_AO 27 +#define AMLOGIC_GPIO_CC 28 +#define AMLOGIC_GPIO_TEST_N 29 + +#endif /* _DT_BINDINGS_AMLOGIC_GPIO_H */