From patchwork Fri Nov 15 14:58:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niko Pasaloukos X-Patchwork-Id: 13876373 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 27DCAD68BC8 for ; Fri, 15 Nov 2024 15:05:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:MIME-Version: Content-Transfer-Encoding:Content-ID:Content-Type:In-Reply-To:References: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=5Ek4/jF9WYv8/AUmwixOSljWV6BckDlAX12l9ITXHRs=; b=O//d6eOpYTkiRRJNKvjVM0kaph OBD+DfnKGa3zp7whRObPCc0zrt+2dqDhbgD/V5iRHIcHrQCaLjzaOTRXtaVo3+6L7CX8Ns7f9QM96 JwDNuasO1b2Gu2bZBto4pNO6zAFwFfAUDJnPdl9Tr9M20nFyg6UFmJ+H+seSDerWPzYq7Zp2l3Hdi 20Bi6jK/chvBcsudfT/nzrH2jDj/k/9Sl0lJdiKb53pCTaDTHO33nhrlUw63IBQHlWshH3yMuiCIE fmCYkaf5+Pr7mv9qyssGd84qDWyNPV2/Q7xj67n+4nZm3LKcAJ82cEha/TE/qS4f3vBdILc0fMaVJ g+kBqM/g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tBxsU-000000035ln-2knq; Fri, 15 Nov 2024 15:04:54 +0000 Received: from mx07-0063e101.pphosted.com ([205.220.184.123]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tBxmD-000000034Ag-3spq for linux-arm-kernel@lists.infradead.org; Fri, 15 Nov 2024 14:58:27 +0000 Received: from pps.filterd (m0247495.ppops.net [127.0.0.1]) by mx08-0063e101.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4AFEpvmX003841; Fri, 15 Nov 2024 14:58:10 GMT Received: from pnzpr01cu001.outbound.protection.outlook.com (mail-centralindiaazlp17011024.outbound.protection.outlook.com [40.93.132.24]) by mx08-0063e101.pphosted.com (PPS) with ESMTPS id 42uwr1sv90-5 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 15 Nov 2024 14:58:09 +0000 (GMT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=nbITV6DQZJ/Rl58jY7xh1hSPn3jB491vccVkA46HZqckWG06e/WG5N2yZBafaEU/rtamK0UOQPdw8cbYPNiY+HI2KBXp0lAfX9NeKpMFNlCzoQLkywMZUKs97wkTYCEZkHVk4ktOdWO030GJWnhRccv7q76ZEu/4fcS4IVhysPeL68BDD5x3dKVJPcEYsLecclvKd+h+Xq/sn/izEcrPTRK3EL8ADcEbO9c1nAyb9moaj/OgpMF4O0lqeDi+q3jSGqwTEHVKzijc2PilBIqq8tD+Ce+ZH5IQfV/r5Zhr6X35P9gq4TXw2DuNpEBIS1Euq0qhHIX2WlnB+CQjaLvraw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=5Ek4/jF9WYv8/AUmwixOSljWV6BckDlAX12l9ITXHRs=; b=oj8nu05rwCfhWby+4DPodLX5U7w4VmWo8a1XFGorVWRgYZ0ug9yXbpXTdmEaOvZ0X3/or1O2Lt9ccjFLlPIBJT2hI1zumMCmNJAN1ivVWoSR1XgETd6gHji1CYH37I8aGuhYcuPj+5v39KSZbqCDodya8NKxSO890Aozy4+KekWlYVDbmPdW7OBIN9Rqc412ACNJRBihcfKPoEhY2zHXhwOq0WeFk4poRCk8Dyq0wwdV/DBHCmXoRzB9icPJmNU6Pq2Yg+hnzL3SWQUjUlq6C/cSdEu5GyRb+Ny07CrxEGi34GICvCoykF2jXJqDfwOcJvj7yA/Uh06wqeWN3zxxpg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=blaize.com; dmarc=pass action=none header.from=blaize.com; dkim=pass header.d=blaize.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=BLAIZE.COM; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=5Ek4/jF9WYv8/AUmwixOSljWV6BckDlAX12l9ITXHRs=; b=VirQIZ76USUwcuE858s10jm1UKKzAo9iWIcJGhux2TPuXZ61/YObF/BZByg0BEPZ5ZvIOZdbFIhMwqo4QvnZklEaYZd2Ey4Ffp1KW787xoF/3NnjsPigr2X+ZsFqytC9CLKcrtVysbdPV7GnH5VFwm64x0M9MXCwnQq84e9f6yQ= Received: from MA0PR01MB10184.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a01:12a::5) by PN3PR01MB9551.INDPRD01.PROD.OUTLOOK.COM (2603:1096:c01:f6::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8158.17; Fri, 15 Nov 2024 14:58:03 +0000 Received: from MA0PR01MB10184.INDPRD01.PROD.OUTLOOK.COM ([fe80::309a:12cf:74a4:5655]) by MA0PR01MB10184.INDPRD01.PROD.OUTLOOK.COM ([fe80::309a:12cf:74a4:5655%3]) with mapi id 15.20.8158.017; Fri, 15 Nov 2024 14:58:03 +0000 From: Niko Pasaloukos To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , James Cowgill , Matt Redfearn , Neil Jones , Niko Pasaloukos , Catalin Marinas , Will Deacon , Arnd Bergmann , Olof Johansson CC: "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "soc@lists.linux.dev" Subject: [PATCH v5 4/6] arm64: Add initial support for Blaize BLZP1600 CB2 Thread-Topic: [PATCH v5 4/6] arm64: Add initial support for Blaize BLZP1600 CB2 Thread-Index: AQHbN27FMiSHFro3wkKi469R5D/ZHA== Date: Fri, 15 Nov 2024 14:58:03 +0000 Message-ID: <20241115-blaize-blzp1600_init_board_support-v5-4-c09094e63dc5@blaize.com> References: <20241115-blaize-blzp1600_init_board_support-v5-0-c09094e63dc5@blaize.com> In-Reply-To: <20241115-blaize-blzp1600_init_board_support-v5-0-c09094e63dc5@blaize.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-publictraffictype: Email x-ms-traffictypediagnostic: MA0PR01MB10184:EE_|PN3PR01MB9551:EE_ x-ms-office365-filtering-correlation-id: 5cbc35a9-d831-4a17-b9ae-08dd0585e7f2 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0;ARA:13230040|366016|1800799024|376014|7416014|921020|38070700018; x-microsoft-antispam-message-info: =?utf-8?q?awuUBnXdv22GcCYMaJ126CUgpTJldqE?= =?utf-8?q?havAhCVZOhryt7/U5aBOCbb5J8MBVsAywPaf8FUahK0dav2U7xT8k/L9u26CWRy80?= =?utf-8?q?L8tQlgjlSYETcJtJeXQHkqh0P1LXWCKZ/7RGNECSNHki4fZ2m/pexF0JjWpWWxqnl?= =?utf-8?q?B+IRHU15YpHnajPBj+bVCC487w4EnJin9kL18qC9X+29Ymc/F9LqMBWqP9N91yOdy?= =?utf-8?q?XAqZcVAcZinILpgJZK+sR5CsanCnR8OIwqqnvLYjKKepa1qfPR18c+Q20qxZPzzi2?= =?utf-8?q?fzwmLVW12hdrhxPdRDkoAXiNgOuqxwFdtwbzxEYC+fr8pfXFQhxwzJJ3YV06SBADU?= =?utf-8?q?PCoHcC63wfNa4f6n0tAYFom+M7DgkeQl3QwsN+laFHj8s77RAGCAnBUYaMxMIWLj3?= =?utf-8?q?jGA2LXu9ZRHS5zfn4doUk6Nfi2yfEXZag3ea50WAYBm/AySCDN4lmPj59uT/c+U52?= =?utf-8?q?WZhnPNmJ8zDD7srrzEja70U58ut9qcIL0gMtUX00faSlCV3ufq2w1hMWhnf840nJu?= =?utf-8?q?XxiDPP1TuWXuQSW6Ya7YQeh9cQQACB9fGq2spcNLg8Ybp2OpUbdoCM/yoka6gF60E?= =?utf-8?q?gjmqvVllnQMn3BqM67HwJ1/5KzB56wkfOFA8L5n33N+8+KcWg3AIvNrSi7LpfBQsY?= =?utf-8?q?YQ+FGI4YP+HspBABSHwdLt2q0ifxsF5mxLvcPl7qQS0Jnah9cTMbcLCYTkJtAr3kB?= =?utf-8?q?hp1K0a6SmKqbvO1YSt4Z+yVK+OZipAfsKnmyjNzmMxnOFujs2bSD0itrCKGZAzDNb?= =?utf-8?q?Nm8m+6tI173mMlM3yhAQ5wAzWppzApkeqOuMw2nZNVbCxFyPIowbp4FysLDS83Tc2?= =?utf-8?q?69g5uQRzJsGJY4/fW8EFd9ZpQzArOAlcBkqKWX6kuGGSJ6BA574hygIbM7pGub/Bu?= =?utf-8?q?6qdSZk1X5m9Wmg+CUbbOGENmhf+CXTX7Zt3Bpzrak2PdvuleuxQiuIfsq9mYLLG5R?= =?utf-8?q?GaW/5LL7LTr/k9BRGOmsMfByOsIIdWMMjkVc6lTuFt7fBHsDKYSaR5x/Y7OeUY8Tr?= =?utf-8?q?GjWyc98ebNbcebWhRAly3+V5hQ2aDwcE8aM88bRZGgXMSR1k93fNdugg+aGbMLRJs?= =?utf-8?q?PVMVGPV9iojnky4OLwBl3dcSvlYSmlUJz5tebuJ/YGSdNI/EEoc0SRYfbsryLQlU1?= =?utf-8?q?wTETQmPPratNr/VJutTT4e8jwvWvVaDNZaukonnusrULFso02eJolyZDyh4ZDVsb6?= =?utf-8?q?ONHLd55AujC99KvJRZO5tgYp/eDrlQMgmRLeWuk1e+2v0vSULsI2+EBQJgNQLH5b1?= =?utf-8?q?ljPIiqD58N1vdfTGcynbhImloPkO+LpLKbuKu9fQ/ylqcerKT755y2/4axpSGKu4P?= =?utf-8?q?5FcjKJ5vI2aR?= x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:MA0PR01MB10184.INDPRD01.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230040)(366016)(1800799024)(376014)(7416014)(921020)(38070700018);DIR:OUT;SFP:1102; x-ms-exchange-antispam-messagedata-chunkcount: 1 x-ms-exchange-antispam-messagedata-0: =?utf-8?q?HXDlcLMLAnrIG0NRXn4hqGNsNbIE?= =?utf-8?q?0mC0G/ScyXmIDKbuuPtfpgeSmJWaH/izz+0lMcp1oeybBKqs40WzHJYMKReyK3yQc?= =?utf-8?q?T6R4i8vRkvOordpNQL13TzEOJ5URSO/MiktvjvOFkkNlVJ+yH/rWJh1K4Zwp32f1q?= =?utf-8?q?qFlunrQvf1UE/JNLzruONlt2zjkEQmhi3gqM3XcnYTEX2ezwR1kNW+W20RYHm7v45?= =?utf-8?q?BvZ0fxebKRlOgBvqXenAz/562HmrxdRDT+S6dQStEPQAODcyUF0dIZGRWkJvycyor?= =?utf-8?q?CO3M+4v4qlewD63mqhjv+js7EkXoqQ9cWkgRD4bzjFuuO+qcecMHYTpMIK5RQ2Tl+?= =?utf-8?q?yAU2o807WOUKfNh+1EkuI3XC5MTWIwj3zkG/gf/OhIGmR8L5/7BK6a/9u1euVr0h+?= =?utf-8?q?nYzXRJlCJzRxRqWmnHqjF1NPCw8ZsHgJfMjcZZzXigcnSnJv+Jkfon78aORvpW9E5?= =?utf-8?q?HaZ3xxveZT30KVs+/CtkKP7MT+Jh1GssWEzLEZMKtKd8mZoDi7XnIK2wOq8ZGn8pl?= =?utf-8?q?JyE0KQRkgWTAOBfbyuR6KBgqWIKStLJTwQ0RQkn7q+irlOAtCVNABeRj3WSA25AFD?= =?utf-8?q?Q2fOzjfrSH/W9kS71zbhCox1sCd7I/vXD8z3HDvE3Z3guhXZYX9twgK49Hg+iIqdY?= =?utf-8?q?7+crVn9VeodiIrzKvFJyICIN+2Z2ShynbhZUqT7uLvwAtg8MRk9+4lfAgM2SJCETp?= =?utf-8?q?ztiV38P/Ke+uHT5dD8+xUPbUvZqJBXreRd8BA5IL2iYWdcUQboRE/VpkuE3zM5fSj?= =?utf-8?q?syjm6Y41DRF+3LU2prYK7fQIX+4tPPALsCAc2ky4uYgYDix28BcKe3WAu/NbcsCS1?= =?utf-8?q?8sX68grGNp/mqeigIUbC683TWZdn6d9chFfbxg7VdINoLEshGHc9SLG2pck+v1rtT?= =?utf-8?q?aatfFz6lBOBtRMqZ0mqFGd54Ry3vfoJzbLbaXGw6dT4or23MDUlnlg/4e0p9V/LP8?= =?utf-8?q?yS2cgESYYAOqspLZFRTnAxqEc23bu33gadPyedtlUtA77uA97CWFhJBlBxcK/vbaU?= =?utf-8?q?41Rsotah8GhsumoogxprrF6BZveVj6nNCIWq97RuX4xTU6ENmGb+fRBHt+VxS2U4H?= =?utf-8?q?LBSrQzs9YUqJ/uQOpSJHwlP5eJvLxXuUMmXkgTFgr/ZoLJ6iDq1DevxdXefcQZmB9?= =?utf-8?q?BJq5VbZrWYat9pss7pKtsnun+u8xGa39s+tJxdeng7y2XoThFdO6Dw8qm4FIq42mC?= =?utf-8?q?30NtydKRAmXNepegCM5en/chUI5wyOhY3emtQCG2ItDHcMX1zeuAGZq10vPyZiuFf?= =?utf-8?q?FAvZqKJtByrh+GdKcbvwb5JtpZ1aiipLO4nvFsTcMp35LZ4RZOolz2zvJmlTZ+Lqa?= =?utf-8?q?O6cc7rHsUyf2NB5A9atmXOF0l4e+59NeluFzWs0Sq5oM52EDk9ePvRzB4koeFcNA2?= =?utf-8?q?OtmHnkHj1EdGsn2OGOYq/a2/BskDkexr3AUuKFgYsyl/NyyCEmKQIHpIlIS20fxSH?= =?utf-8?q?xl/Km0GQgybWeXCKnWWijd5XPtIFXretiOne5T7xRjweq1rHi7J9F4MuYpAlihlos?= =?utf-8?q?AjLvY0AdeNGrsSpUgMptgLEHqMQdqOGHvA=3D=3D?= Content-ID: <09BF877DBB88244DA5D0D31C7DF8C669@INDPRD01.PROD.OUTLOOK.COM> MIME-Version: 1.0 X-OriginatorOrg: blaize.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MA0PR01MB10184.INDPRD01.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-Network-Message-Id: 5cbc35a9-d831-4a17-b9ae-08dd0585e7f2 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Nov 2024 14:58:03.6491 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 9d1c3c89-8615-4064-88a7-bb1a8537c779 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: lifTBr/YBFTksvUOQ69BYj/sJMv6pOT4zZPOUk8FmiuRW1QKI99mZnC3yk/EOvy49tSoVZGYLmVSais/gvc6+qqtQRF/GlPzozuEHl7k/NM= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PN3PR01MB9551 X-Proofpoint-ORIG-GUID: f9tICjWa674SO_bGG5ou8WA5UvovEDvg X-Proofpoint-GUID: f9tICjWa674SO_bGG5ou8WA5UvovEDvg X-Authority-Analysis: v=2.4 cv=YMvNygGx c=1 sm=1 tr=0 ts=67376182 cx=c_pps a=RRW9qgVLUv3Tpt3ACdNssw==:117 a=wKuvFiaSGQ0qltdbU6+NXLB8nM8=:19 a=Ol13hO9ccFRV9qXi2t6ftBPywas=:19 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=VlfZXiiP6vEA:10 a=4MthsM0t3ikA:10 a=-5LYVjoNHPMA:10 a=SrsycIMJAAAA:8 a=zNpoL5Q305cfwrSi0psA:9 a=QEXdDO2ut3YA:10 a=RVmHIydaz68A:10 a=zapPnUM7SFj2ezx6rUw-:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.62.30 definitions=2024-11-14_05,2024-11-14_01,2024-09-30_01 X-Proofpoint-Spam-Reason: orgsafe X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241115_065826_282578_AF9D3157 X-CRM114-Status: GOOD ( 19.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for the Blaize CB2 development board based on the BLZP1600 SoC. This consists of a Carrier-Board-2 and a System-on-Module. Both BLZP1600 SoM and CB2 are available as products. CB2 (Pathfinder) has multiple peripherals like UART, I2C, SPI, GPIO, CSI (camera), DSI (display), USB-3.0 and Ethernet. Enable support for the Cryptocell, UART and I2C which are already fully supported by the drivers. The blaize-blzp1600.dtsi is the common part for the SoC, blaize-blzp1600-som.dtsi is the common part for the SoM and blaize-blzp1600-cb2.dts is the board specific file. Co-developed-by: James Cowgill Signed-off-by: James Cowgill Co-developed-by: Matt Redfearn Signed-off-by: Matt Redfearn Co-developed-by: Neil Jones Signed-off-by: Neil Jones Signed-off-by: Nikolaos Pasaloukos --- arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/blaize/Makefile | 2 + arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts | 83 +++++++++ .../arm64/boot/dts/blaize/blaize-blzp1600-som.dtsi | 23 +++ arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi | 205 +++++++++++++++++++++ 5 files changed, 314 insertions(+) diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index 21cd3a87f385309c3a655a67a3bee5f0abed7545..79b73a21ddc22b17308554e502f8207392935b45 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -10,6 +10,7 @@ subdir-y += apm subdir-y += apple subdir-y += arm subdir-y += bitmain +subdir-y += blaize subdir-y += broadcom subdir-y += cavium subdir-y += exynos diff --git a/arch/arm64/boot/dts/blaize/Makefile b/arch/arm64/boot/dts/blaize/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..7e10b3199e6c73b64c826fef1aa4058c7b3e898b --- /dev/null +++ b/arch/arm64/boot/dts/blaize/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0+ +dtb-$(CONFIG_ARCH_BLAIZE) += blaize-blzp1600-cb2.dtb diff --git a/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts b/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts new file mode 100644 index 0000000000000000000000000000000000000000..7e3cef2ed3522e202487e799b2021cd45398e006 --- /dev/null +++ b/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2024 Blaize, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "blaize-blzp1600-som.dtsi" + +/ { + model = "Blaize BLZP1600 SoM1600P CB2 Development Board"; + + compatible = "blaize,blzp1600-cb2", "blaize,blzp1600"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200"; + }; +}; + +&i2c0 { + clock-frequency = <100000>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + status = "okay"; +}; + +&i2c3 { + clock-frequency = <100000>; + status = "okay"; + + gpio_expander: gpio@74 { + compatible = "ti,tca9539"; + reg = <0x74>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "RSP_PIN_7", /* GPIO_0 */ + "RSP_PIN_11", /* GPIO_1 */ + "RSP_PIN_13", /* GPIO_2 */ + "RSP_PIN_15", /* GPIO_3 */ + "RSP_PIN_27", /* GPIO_4 */ + "RSP_PIN_29", /* GPIO_5 */ + "RSP_PIN_31", /* GPIO_6 */ + "RSP_PIN_33", /* GPIO_7 */ + "RSP_PIN_37", /* GPIO_8 */ + "RSP_PIN_16", /* GPIO_9 */ + "RSP_PIN_18", /* GPIO_10 */ + "RSP_PIN_22", /* GPIO_11 */ + "RSP_PIN_28", /* GPIO_12 */ + "RSP_PIN_32", /* GPIO_13 */ + "RSP_PIN_36", /* GPIO_14 */ + "TP31"; /* GPIO_15 */ + }; + + gpio_expander_m2: gpio@75 { + compatible = "ti,tca9539"; + reg = <0x75>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "M2_W_DIS1_N", /* GPIO_0 */ + "M2_W_DIS2_N", /* GPIO_1 */ + "M2_UART_WAKE_N", /* GPIO_2 */ + "M2_COEX3", /* GPIO_3 */ + "M2_COEX_RXD", /* GPIO_4 */ + "M2_COEX_TXD", /* GPIO_5 */ + "M2_VENDOR_PIN40", /* GPIO_6 */ + "M2_VENDOR_PIN42", /* GPIO_7 */ + "M2_VENDOR_PIN38", /* GPIO_8 */ + "M2_SDIO_RST_N", /* GPIO_9 */ + "M2_SDIO_WAKE_N", /* GPIO_10 */ + "M2_PETN1", /* GPIO_11 */ + "M2_PERP1", /* GPIO_12 */ + "M2_PERN1", /* GPIO_13 */ + "UIM_SWP", /* GPIO_14 */ + "UART1_TO_RSP"; /* GPIO_15 */ + }; +}; diff --git a/arch/arm64/boot/dts/blaize/blaize-blzp1600-som.dtsi b/arch/arm64/boot/dts/blaize/blaize-blzp1600-som.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..bfdff5953edd95341440aa98569a019adcc0425d --- /dev/null +++ b/arch/arm64/boot/dts/blaize/blaize-blzp1600-som.dtsi @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2024 Blaize, Inc. All rights reserved. + */ + +#include "blaize-blzp1600.dtsi" + +/ { + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x1 0x0>; + }; +}; + +/* i2c4 bus is available only on the SoM, not on the board */ +&i2c4 { + clock-frequency = <100000>; + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi b/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..7d399e6a532f5b24385dd837be965be771c7d24c --- /dev/null +++ b/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi @@ -0,0 +1,205 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2024 Blaize, Inc. All rights reserved. + */ + +/dts-v1/; + +#include +#include + +/ { + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + compatible = "arm,cortex-a53"; + reg = <0x0 0x0>; + device_type = "cpu"; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu1: cpu@1 { + compatible = "arm,cortex-a53"; + reg = <0x0 0x1>; + device_type = "cpu"; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + l2: l2-cache0 { + compatible = "cache"; + cache-level = <2>; + cache-unified; + }; + }; + + firmware { + scmi { + compatible = "arm,scmi-smc"; + arm,smc-id = <0x82002000>; + #address-cells = <1>; + #size-cells = <0>; + + shmem = <&scmi0_shm>; + + scmi_clk: protocol@14 { + reg = <0x14>; + #clock-cells = <1>; + }; + + scmi_rst: protocol@16 { + reg = <0x16>; + #reset-cells = <1>; + }; + }; + }; + + pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , + ; + interrupt-affinity = <&cpu0>, <&cpu1>; + }; + + psci { + compatible = "arm,psci-1.0", "arm,psci-0.2"; + method = "smc"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* SCMI reserved buffer space on DDR space */ + scmi0_shm: scmi-shmem@800 { + compatible = "arm,scmi-shmem"; + reg = <0x0 0x800 0x0 0x80>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = /* Physical Secure PPI */ + , + /* Physical Non-Secure PPI */ + , + /* Hypervisor PPI */ + , + /* Virtual PPI */ + ; + }; + + soc@200000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x2 0x0 0x850000>; + + gic: interrupt-controller@410000 { + compatible = "arm,gic-400"; + reg = <0x410000 0x20000>, + <0x420000 0x20000>, + <0x440000 0x20000>, + <0x460000 0x20000>; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + interrupts = ; + }; + + uart0: serial@4d0000 { + compatible = "ns16550a"; + reg = <0x4d0000 0x1000>; + clocks = <&scmi_clk 59>; + resets = <&scmi_rst 59>; + reg-shift = <2>; + interrupts = ; + status = "disabled"; + }; + + uart1: serial@4e0000 { + compatible = "ns16550a"; + reg = <0x4e0000 0x1000>; + clocks = <&scmi_clk 60>; + resets = <&scmi_rst 60>; + reg-shift = <2>; + interrupts = ; + status = "disabled"; + }; + + i2c0: i2c@4f0000 { + compatible = "snps,designware-i2c"; + reg = <0x4f0000 0x1000>; + interrupts = ; + clocks = <&scmi_clk 54>; + resets = <&scmi_rst 54>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c1: i2c@500000 { + compatible = "snps,designware-i2c"; + reg = <0x500000 0x1000>; + interrupts = ; + clocks = <&scmi_clk 55>; + resets = <&scmi_rst 55>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c@510000 { + compatible = "snps,designware-i2c"; + reg = <0x510000 0x1000>; + interrupts = ; + clocks = <&scmi_clk 56>; + resets = <&scmi_rst 56>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c3: i2c@520000 { + compatible = "snps,designware-i2c"; + reg = <0x520000 0x1000>; + interrupts = ; + clocks = <&scmi_clk 57>; + resets = <&scmi_rst 57>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c4: i2c@530000 { + compatible = "snps,designware-i2c"; + reg = <0x530000 0x1000>; + interrupts = ; + clocks = <&scmi_clk 58>; + resets = <&scmi_rst 58>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + arm_cc712: crypto@550000 { + compatible = "arm,cryptocell-712-ree"; + reg = <0x550000 0x1000>; + interrupts = ; + clocks = <&scmi_clk 7>; + }; + }; +};