From patchwork Sat Nov 16 18:22:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 13877701 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 712BCD68BE7 for ; Sat, 16 Nov 2024 18:24:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=oby7T5Io3jaGrnkTlP4h+NDOm4tFxNcndhBAr6wlBxk=; b=1Pl0tijkGTB7DF1paMFWRyYS97 vb86HbwuaNbdfaiMjZXf63s4/FWSmZgLw3enoZEWOTOu0qdKXlQRF6dRAhuLqaTFFLZHJSV6RwEIc ThHfDpgN746IhGDcUmwvVifnIglen6s4mAC82wIfg/4rL7uxj4HNAYo5BX/hkq1JxJUFV1EGszwNm 6JHPUVbK6ZKVlcKfFdhpb9xhlOxeVJisufdiVTXjV0tZ0odzxR3i3vlJhPTlEeoda2xyyNzLDDtdd KRJGQT+D2H2g7bQkXsr2a6j/KvMG24wOZP12s2Fs1gKsqV75mc1n6ZZabOxo2+hmm+2pJ0E8O1CMT R2XibkwA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tCNTO-000000062Pr-1o5G; Sat, 16 Nov 2024 18:24:42 +0000 Received: from bali.collaboradmins.com ([2a01:4f8:201:9162::2]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tCNRU-000000061xb-3uun; Sat, 16 Nov 2024 18:22:49 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1731781362; bh=LM9pPGTp7aEnr4m+OjZM6CvE5/x0hk9Hpk+Ltg9gsoA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=THAD5DlDfMEE4ka+eb1K53htNf0/75tr6CJobRdrV0z9lwIZUM3bob9PdEL6rA836 T/BfujG+lglncPzIFhG1tv3kKrrNobc5KTbSHWFyY4K67Ov09Am6iPdNlfgJcWLskd zIHBySIkxCa0ZmeS+Q0aT9CKZ5IAtK9IAsuqaL9jObN1b0vneKMl48a5bQXFpsWHN0 t/VIYkVZrzgHpJ0n046i23OjCtxgHeZPrrrcQjTGyFoQghtSbg2EJHx2iS47DqJfxY V90Y1SiacyMzJ0OupDYxxJ4nxhe3iUV9KX+Bu+NxDbJ1nd+g2Z79qCkEvz9w8JMqTx joqoJZBftbP7A== Received: from localhost (unknown [86.120.21.57]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id 5121A17E3778; Sat, 16 Nov 2024 19:22:42 +0100 (CET) From: Cristian Ciocaltea Date: Sat, 16 Nov 2024 20:22:32 +0200 Subject: [PATCH 1/5] dt-bindings: display: vop2: Add optional PLL clock properties MIME-Version: 1.0 Message-Id: <20241116-vop2-hdmi0-disp-modes-v1-1-2bca51db4898@collabora.com> References: <20241116-vop2-hdmi0-disp-modes-v1-0-2bca51db4898@collabora.com> In-Reply-To: <20241116-vop2-hdmi0-disp-modes-v1-0-2bca51db4898@collabora.com> To: Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , Andy Yan , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: kernel@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241116_102245_153772_D806BCEA X-CRM114-Status: UNSURE ( 8.87 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On RK3588, HDMI PHY PLL can be used as an alternative and more accurate pixel clock source for VOP2 video ports 0, 1 and 2. Document the optional PLL clock properties corresponding to the two HDMI PHYs available on the SoC. Signed-off-by: Cristian Ciocaltea --- Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml index 2531726af306bd388c00c3c0a1785b2c7367e2bd..46d956e63338e196361483a668fbf5597ebce24f 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml @@ -53,6 +53,8 @@ properties: - description: Pixel clock for video port 2. - description: Pixel clock for video port 3. - description: Peripheral(vop grf/dsi) clock. + - description: Alternative pixel clock provided by HDMI0 PHY PLL. + - description: Alternative pixel clock provided by HDMI1 PHY PLL. clock-names: minItems: 5 @@ -64,6 +66,8 @@ properties: - const: dclk_vp2 - const: dclk_vp3 - const: pclk_vop + - const: pll_hdmiphy0 + - const: pll_hdmiphy1 rockchip,grf: $ref: /schemas/types.yaml#/definitions/phandle