| Message ID | 20241120171048.2839621-2-cassel@kernel.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: rockchip: rk3588: add msi-parent for pcie3x4_ep | expand |
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi index 4a950907ea6f..ead151941e84 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi @@ -213,6 +213,7 @@ pcie3x4_ep: pcie-ep@fe150000 { interrupt-names = "sys", "pmc", "msg", "legacy", "err", "dma0", "dma1", "dma2", "dma3"; max-link-speed = <3>; + msi-parent = <&its1 0x0000>; iommus = <&mmu600_pcie 0x0000>; num-lanes = <4>; phys = <&pcie30phy>;
Add msi-parent for the pcie3x4_ep PCI endpoint node. The pcie3x4_ep node should use the same msi-parent as the pcie3x4 node (which represents the PCIe controller running in Root Complex mode). The GIC ITS can be used to trigger an IRQ on the endpoint when any of the endpoint's PCI BARs are written to by the host[1]. [1] https://lore.kernel.org/linux-pci/20241116-ep-msi-v8-0-6f1f68ffd1bb@nxp.com/ Signed-off-by: Niklas Cassel <cassel@kernel.org> --- Hello Heiko, this patch depends on: https://lore.kernel.org/linux-rockchip/20241107123732.1160063-2-cassel@kernel.org/ arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi | 1 + 1 file changed, 1 insertion(+)