Message ID | 20241204092855.1365638-3-wenst@chromium.org (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | mmc: mtk-sd: Limit second register range to SoCs requiring it | expand |
Il 04/12/24 10:28, Chen-Yu Tsai ha scritto: > Currently the mtk-sd driver tries to get and map the second register > base, named top_base in the code, regardless of whether the SoC model > actually has it or not. This produces confusing big error messages on > the platforms that don't need it: > > mtk-msdc 11260000.mmc: error -EINVAL: invalid resource (null) > > Limit it to the platforms that actually require it, based on their > device tree entries, and properly fail if it is missing. There is > no MMC node in the MT6779 dts, so it's currently unknown if that > platform needs it or not. > No, it doesn't require it. The controller is (very) similar to the one found on MT6795 :-) > Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Can you please remove that "I don't know about mt6779" mention, now that you do know? Btw, Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > drivers/mmc/host/mtk-sd.c | 15 +++++++++++---- > 1 file changed, 11 insertions(+), 4 deletions(-) > > diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c > index e2c385853eef..1bb7044f4ca1 100644 > --- a/drivers/mmc/host/mtk-sd.c > +++ b/drivers/mmc/host/mtk-sd.c > @@ -414,6 +414,7 @@ struct mtk_mmc_compatible { > u8 clk_div_bits; > bool recheck_sdio_irq; > bool hs400_tune; /* only used for MT8173 */ > + bool needs_top_base; > u32 pad_tune_reg; > bool async_fifo; > bool data_tune; > @@ -587,6 +588,7 @@ static const struct mtk_mmc_compatible mt7986_compat = { > .clk_div_bits = 12, > .recheck_sdio_irq = true, > .hs400_tune = false, > + .needs_top_base = true, > .pad_tune_reg = MSDC_PAD_TUNE0, > .async_fifo = true, > .data_tune = true, > @@ -627,6 +629,7 @@ static const struct mtk_mmc_compatible mt8183_compat = { > .clk_div_bits = 12, > .recheck_sdio_irq = false, > .hs400_tune = false, > + .needs_top_base = true, > .pad_tune_reg = MSDC_PAD_TUNE0, > .async_fifo = true, > .data_tune = true, > @@ -653,6 +656,7 @@ static const struct mtk_mmc_compatible mt8196_compat = { > .clk_div_bits = 12, > .recheck_sdio_irq = false, > .hs400_tune = false, > + .needs_top_base = true, > .pad_tune_reg = MSDC_PAD_TUNE0, > .async_fifo = true, > .data_tune = true, > @@ -2887,9 +2891,13 @@ static int msdc_drv_probe(struct platform_device *pdev) > if (IS_ERR(host->base)) > return PTR_ERR(host->base); > > - host->top_base = devm_platform_ioremap_resource(pdev, 1); > - if (IS_ERR(host->top_base)) > - host->top_base = NULL; > + host->dev_comp = of_device_get_match_data(&pdev->dev); > + > + if (host->dev_comp->needs_top_base) { > + host->top_base = devm_platform_ioremap_resource(pdev, 1); > + if (IS_ERR(host->top_base)) > + return PTR_ERR(host->top_base); > + } > > ret = mmc_regulator_get_supply(mmc); > if (ret) > @@ -2951,7 +2959,6 @@ static int msdc_drv_probe(struct platform_device *pdev) > msdc_of_property_parse(pdev, host); > > host->dev = &pdev->dev; > - host->dev_comp = of_device_get_match_data(&pdev->dev); > host->src_clk_freq = clk_get_rate(host->src_clk); > /* Set host parameters to mmc */ > mmc->ops = &mt_msdc_ops;
diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c index e2c385853eef..1bb7044f4ca1 100644 --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c @@ -414,6 +414,7 @@ struct mtk_mmc_compatible { u8 clk_div_bits; bool recheck_sdio_irq; bool hs400_tune; /* only used for MT8173 */ + bool needs_top_base; u32 pad_tune_reg; bool async_fifo; bool data_tune; @@ -587,6 +588,7 @@ static const struct mtk_mmc_compatible mt7986_compat = { .clk_div_bits = 12, .recheck_sdio_irq = true, .hs400_tune = false, + .needs_top_base = true, .pad_tune_reg = MSDC_PAD_TUNE0, .async_fifo = true, .data_tune = true, @@ -627,6 +629,7 @@ static const struct mtk_mmc_compatible mt8183_compat = { .clk_div_bits = 12, .recheck_sdio_irq = false, .hs400_tune = false, + .needs_top_base = true, .pad_tune_reg = MSDC_PAD_TUNE0, .async_fifo = true, .data_tune = true, @@ -653,6 +656,7 @@ static const struct mtk_mmc_compatible mt8196_compat = { .clk_div_bits = 12, .recheck_sdio_irq = false, .hs400_tune = false, + .needs_top_base = true, .pad_tune_reg = MSDC_PAD_TUNE0, .async_fifo = true, .data_tune = true, @@ -2887,9 +2891,13 @@ static int msdc_drv_probe(struct platform_device *pdev) if (IS_ERR(host->base)) return PTR_ERR(host->base); - host->top_base = devm_platform_ioremap_resource(pdev, 1); - if (IS_ERR(host->top_base)) - host->top_base = NULL; + host->dev_comp = of_device_get_match_data(&pdev->dev); + + if (host->dev_comp->needs_top_base) { + host->top_base = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(host->top_base)) + return PTR_ERR(host->top_base); + } ret = mmc_regulator_get_supply(mmc); if (ret) @@ -2951,7 +2959,6 @@ static int msdc_drv_probe(struct platform_device *pdev) msdc_of_property_parse(pdev, host); host->dev = &pdev->dev; - host->dev_comp = of_device_get_match_data(&pdev->dev); host->src_clk_freq = clk_get_rate(host->src_clk); /* Set host parameters to mmc */ mmc->ops = &mt_msdc_ops;
Currently the mtk-sd driver tries to get and map the second register base, named top_base in the code, regardless of whether the SoC model actually has it or not. This produces confusing big error messages on the platforms that don't need it: mtk-msdc 11260000.mmc: error -EINVAL: invalid resource (null) Limit it to the platforms that actually require it, based on their device tree entries, and properly fail if it is missing. There is no MMC node in the MT6779 dts, so it's currently unknown if that platform needs it or not. Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> --- drivers/mmc/host/mtk-sd.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-)