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[2/5] arm64: dts: mediatek: mt8516: fix wdt irq type

Message ID 20241204190524.21862-3-val@packett.cool (mailing list archive)
State New
Headers show
Series MT8516/MT8167 dtsi fixes | expand

Commit Message

Val Packett Dec. 4, 2024, 7:05 p.m. UTC 
The GICv2 does not support EDGE_FALLING interrupts, so the watchdog
would refuse to attach due to a failing check coming from the GIC driver.

Fixes: 5236347bde42 ("arm64: dts: mediatek: add dtsi for MT8516")
Signed-off-by: Val Packett <val@packett.cool>
---
 arch/arm64/boot/dts/mediatek/mt8516.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

AngeloGioacchino Del Regno Dec. 5, 2024, 12:26 p.m. UTC | #1 
Il 04/12/24 20:05, Val Packett ha scritto:
> The GICv2 does not support EDGE_FALLING interrupts, so the watchdog
> would refuse to attach due to a failing check coming from the GIC driver.
> 
> Fixes: 5236347bde42 ("arm64: dts: mediatek: add dtsi for MT8516")
> Signed-off-by: Val Packett <val@packett.cool>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

> ---
>   arch/arm64/boot/dts/mediatek/mt8516.dtsi | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8516.dtsi b/arch/arm64/boot/dts/mediatek/mt8516.dtsi
> index 444429341302..098c32ebf678 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8516.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8516.dtsi
> @@ -206,7 +206,7 @@ watchdog@10007000 {
>   			compatible = "mediatek,mt8516-wdt",
>   				     "mediatek,mt6589-wdt";
>   			reg = <0 0x10007000 0 0x1000>;
> -			interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_FALLING>;
> +			interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>;
>   			#reset-cells = <1>;
>   		};
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt8516.dtsi b/arch/arm64/boot/dts/mediatek/mt8516.dtsi
index 444429341302..098c32ebf678 100644
--- a/arch/arm64/boot/dts/mediatek/mt8516.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8516.dtsi
@@ -206,7 +206,7 @@  watchdog@10007000 {
 			compatible = "mediatek,mt8516-wdt",
 				     "mediatek,mt6589-wdt";
 			reg = <0 0x10007000 0 0x1000>;
-			interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_FALLING>;
+			interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>;
 			#reset-cells = <1>;
 		};