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Wed, 04 Dec 2024 20:56:22 -0800 (PST) From: Mingwei Zheng To: linus.walleij@linaro.org, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, make24@iscas.ac.cn, peng.fan@nxp.com, fabien.dessenne@foss.st.com, marex@denx.de Cc: linux-gpio@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Mingwei Zheng , Jiasheng Jiang Subject: [PATCH] pinctrl: stm32: Add check for clk_enable() Date: Wed, 4 Dec 2024 23:59:42 -0500 Message-Id: <20241205045942.2441430-1-zmw12306@gmail.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241204_205625_439046_7C21AA29 X-CRM114-Status: GOOD ( 13.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add check for the return value of clk_enable() to catch the potential error. Add a cleanup loop to disable clocks already enabled in case of an error during clock enabling for subsequent banks. Fixes: 05d8af449d93 ("pinctrl: stm32: Keep pinctrl block clock enabled when LEVEL IRQ requested") Signed-off-by: Mingwei Zheng Signed-off-by: Jiasheng Jiang --- drivers/pinctrl/stm32/pinctrl-stm32.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c index 5b7fa77c1184..eb7b2f864d88 100644 --- a/drivers/pinctrl/stm32/pinctrl-stm32.c +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c @@ -1738,10 +1738,16 @@ int __maybe_unused stm32_pinctrl_resume(struct device *dev) { struct stm32_pinctrl *pctl = dev_get_drvdata(dev); struct stm32_pinctrl_group *g = pctl->groups; - int i; + int i, j, ret; - for (i = 0; i < pctl->nbanks; i++) - clk_enable(pctl->banks[i].clk); + for (i = 0; i < pctl->nbanks; i++) { + ret = clk_enable(pctl->banks[i].clk); + if (ret) { + for (j = 0; j < i; j++) + clk_disable(pctl->banks[j].clk); + return ret; + } + } for (i = 0; i < pctl->ngroups; i++, g++) stm32_pinctrl_restore_gpio_regs(pctl, g->pin);