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AJvYcCWKswIJMlQPdePBStbrpZV/rSfRW2eKvhEUNESjvq2/Yr2ZCzwLgncanXaHuckdrYph46kpMS9uWV5/wn56LQkx@lists.infradead.org X-Gm-Message-State: AOJu0Yz2haBMgUKrlR/BXf5eKSNaFCmy+5IAdzIhXTx1RIrSPoxyefSB aJiJl4rMHhKjvqGZqsP1GHXMgB5OFPaoxz4xrH4vUGzOmWMo02VR655LDIP9Jnaf63jeh87XHAq IFYDLOCPtmA== X-Google-Smtp-Source: AGHT+IFU5A2xYG/aIaT/yYE5/fNPeYIneyer4lpXo+usrcm3VGdKeb0NPMFh6orkypYDcbhz8IOsQoPR+yxjUA== X-Received: from wmmu14.prod.google.com ([2002:a05:600c:ce:b0:434:f0a3:7876]) (user=smostafa job=prod-delivery.src-stubby-dispatcher) by 2002:a05:600c:3593:b0:434:f297:8e85 with SMTP id 5b1f17b1804b1-4361c3aaeeemr77507485e9.10.1734026733780; Thu, 12 Dec 2024 10:05:33 -0800 (PST) Date: Thu, 12 Dec 2024 18:03:48 +0000 In-Reply-To: <20241212180423.1578358-1-smostafa@google.com> Mime-Version: 1.0 References: <20241212180423.1578358-1-smostafa@google.com> X-Mailer: git-send-email 2.47.1.613.gc27f4b7a9f-goog Message-ID: <20241212180423.1578358-25-smostafa@google.com> Subject: [RFC PATCH v2 24/58] KVM: arm64: iommu: Support DABT for IOMMU From: Mostafa Saleh To: iommu@lists.linux.dev, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, robdclark@gmail.com, joro@8bytes.org, robin.murphy@arm.com, jean-philippe@linaro.org, jgg@ziepe.ca, nicolinc@nvidia.com, vdonnefort@google.com, qperret@google.com, tabba@google.com, danielmentz@google.com, tzukui@google.com, Mostafa Saleh X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241212_100535_867469_E543A58D X-CRM114-Status: GOOD ( 18.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Soon, SMMUv3 driver would be added and it would need to emulate access to some of its MMIO space. Add a handler for DABTs for IOMMU drivers to be able to do so. Signed-off-by: Mostafa Saleh --- arch/arm64/kvm/hyp/include/nvhe/iommu.h | 2 ++ arch/arm64/kvm/hyp/nvhe/iommu/iommu.c | 17 +++++++++++++++++ arch/arm64/kvm/hyp/nvhe/mem_protect.c | 19 +++++++++++++++++-- 3 files changed, 36 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kvm/hyp/include/nvhe/iommu.h b/arch/arm64/kvm/hyp/include/nvhe/iommu.h index 06d12b35fa3e..cff75d67d807 100644 --- a/arch/arm64/kvm/hyp/include/nvhe/iommu.h +++ b/arch/arm64/kvm/hyp/include/nvhe/iommu.h @@ -21,6 +21,7 @@ size_t kvm_iommu_map_pages(pkvm_handle_t domain_id, size_t kvm_iommu_unmap_pages(pkvm_handle_t domain_id, unsigned long iova, size_t pgsize, size_t pgcount); phys_addr_t kvm_iommu_iova_to_phys(pkvm_handle_t domain_id, unsigned long iova); +bool kvm_iommu_host_dabt_handler(struct kvm_cpu_context *host_ctxt, u64 esr, u64 addr); /* Flags for memory allocation for IOMMU drivers */ #define IOMMU_PAGE_NOCACHE BIT(0) @@ -49,6 +50,7 @@ struct kvm_iommu_ops { phys_addr_t (*iova_to_phys)(struct kvm_hyp_iommu_domain *domain, unsigned long iova); void (*iotlb_sync)(struct kvm_hyp_iommu_domain *domain, struct iommu_iotlb_gather *gather); + bool (*dabt_handler)(struct kvm_cpu_context *host_ctxt, u64 esr, u64 addr); }; int kvm_iommu_init(void); diff --git a/arch/arm64/kvm/hyp/nvhe/iommu/iommu.c b/arch/arm64/kvm/hyp/nvhe/iommu/iommu.c index fbab335d3490..e45dadd0c4aa 100644 --- a/arch/arm64/kvm/hyp/nvhe/iommu/iommu.c +++ b/arch/arm64/kvm/hyp/nvhe/iommu/iommu.c @@ -4,6 +4,10 @@ * * Copyright (C) 2022 Linaro Ltd. */ +#include + +#include + #include #include @@ -375,6 +379,19 @@ phys_addr_t kvm_iommu_iova_to_phys(pkvm_handle_t domain_id, unsigned long iova) return phys; } +bool kvm_iommu_host_dabt_handler(struct kvm_cpu_context *host_ctxt, u64 esr, u64 addr) +{ + bool ret = false; + + if (kvm_iommu_ops && kvm_iommu_ops->dabt_handler) + ret = kvm_iommu_ops->dabt_handler(host_ctxt, esr, addr); + + if (ret) + kvm_skip_host_instr(); + + return ret; +} + static int iommu_power_on(struct kvm_power_domain *pd) { struct kvm_hyp_iommu *iommu = container_of(pd, struct kvm_hyp_iommu, diff --git a/arch/arm64/kvm/hyp/nvhe/mem_protect.c b/arch/arm64/kvm/hyp/nvhe/mem_protect.c index a428ad9ca871..0fae651107db 100644 --- a/arch/arm64/kvm/hyp/nvhe/mem_protect.c +++ b/arch/arm64/kvm/hyp/nvhe/mem_protect.c @@ -16,6 +16,7 @@ #include #include +#include #include #include #include @@ -799,11 +800,16 @@ static int handle_host_perm_fault(struct kvm_cpu_context *host_ctxt, u64 esr, u6 return handled ? 0 : -EPERM; } +static bool is_dabt(u64 esr) +{ + return ESR_ELx_EC(esr) == ESR_ELx_EC_DABT_LOW; +} + void handle_host_mem_abort(struct kvm_cpu_context *host_ctxt) { struct kvm_vcpu_fault_info fault; u64 esr, addr; - int ret = 0; + int ret = -EPERM; esr = read_sysreg_el2(SYS_ESR); if (!__get_fault_info(esr, &fault)) { @@ -817,7 +823,15 @@ void handle_host_mem_abort(struct kvm_cpu_context *host_ctxt) } addr = (fault.hpfar_el2 & HPFAR_MASK) << 8; - ret = host_stage2_idmap(addr); + addr |= fault.far_el2 & FAR_MASK; + + if (is_dabt(esr) && !addr_is_memory(addr) && + kvm_iommu_host_dabt_handler(host_ctxt, esr, addr)) + goto return_to_host; + + /* If not handled, attempt to map the page. */ + if (ret == -EPERM) + ret = host_stage2_idmap(addr); if ((esr & ESR_ELx_FSC_TYPE) == ESR_ELx_FSC_PERM) ret = handle_host_perm_fault(host_ctxt, esr, addr); @@ -827,6 +841,7 @@ void handle_host_mem_abort(struct kvm_cpu_context *host_ctxt) else BUG_ON(ret && ret != -EAGAIN); +return_to_host: trace_host_mem_abort(esr, addr); }