| Message ID | 20241213-amlogic-clk-g12a-cpua-parent-fix-v1-1-d8c0f41865fe@baylibre.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | clk: amlogic: g12b: fix cluster A parent data | expand |
On 13/12/2024 15:30, Jerome Brunet wrote: > Several clocks used by both g12a and g12b use the g12a cpu A clock hw > pointer as clock parent. This is incorrect on g12b since the parents of > cluster A cpu clock are different. Also the hw clock provided as parent to > these children is not even registered clock on g12b. > > Fix the problem by reverting to the global namespace and let CCF pick > the appropriate, as it is already done for other clocks, such as > cpu_clk_trace_div. > > Fixes: 25e682a02d91 ("clk: meson: g12a: migrate to the new parent description method") > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> > --- > drivers/clk/meson/g12a.c | 36 ++++++++++++++++++++++++------------ > 1 file changed, 24 insertions(+), 12 deletions(-) > > diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c > index 20be7b037c07535bd2115f6e70404a95a7832756..4e6584377e43fa7c9956017ddfcd3f295fafd686 100644 > --- a/drivers/clk/meson/g12a.c > +++ b/drivers/clk/meson/g12a.c > @@ -1137,8 +1137,18 @@ static struct clk_regmap g12a_cpu_clk_div16_en = { > .hw.init = &(struct clk_init_data) { > .name = "cpu_clk_div16_en", > .ops = &clk_regmap_gate_ro_ops, > - .parent_hws = (const struct clk_hw *[]) { > - &g12a_cpu_clk.hw > + .parent_data = &(const struct clk_parent_data) { > + /* > + * Note: > + * G12A and G12B have different cpu clocks (with > + * different struct clk_hw). We fallback to the global > + * naming string mechanism so this clock picks > + * up the appropriate one. Same goes for the other > + * clock using cpu cluster A clock output and present > + * on both G12 variant. > + */ > + .name = "cpu_clk", > + .index = -1, > }, > .num_parents = 1, > /* > @@ -1203,7 +1213,10 @@ static struct clk_regmap g12a_cpu_clk_apb_div = { > .hw.init = &(struct clk_init_data){ > .name = "cpu_clk_apb_div", > .ops = &clk_regmap_divider_ro_ops, > - .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw }, > + .parent_data = &(const struct clk_parent_data) { > + .name = "cpu_clk", > + .index = -1, > + }, > .num_parents = 1, > }, > }; > @@ -1237,7 +1250,10 @@ static struct clk_regmap g12a_cpu_clk_atb_div = { > .hw.init = &(struct clk_init_data){ > .name = "cpu_clk_atb_div", > .ops = &clk_regmap_divider_ro_ops, > - .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw }, > + .parent_data = &(const struct clk_parent_data) { > + .name = "cpu_clk", > + .index = -1, > + }, > .num_parents = 1, > }, > }; > @@ -1271,7 +1287,10 @@ static struct clk_regmap g12a_cpu_clk_axi_div = { > .hw.init = &(struct clk_init_data){ > .name = "cpu_clk_axi_div", > .ops = &clk_regmap_divider_ro_ops, > - .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw }, > + .parent_data = &(const struct clk_parent_data) { > + .name = "cpu_clk", > + .index = -1, > + }, > .num_parents = 1, > }, > }; > @@ -1306,13 +1325,6 @@ static struct clk_regmap g12a_cpu_clk_trace_div = { > .name = "cpu_clk_trace_div", > .ops = &clk_regmap_divider_ro_ops, > .parent_data = &(const struct clk_parent_data) { > - /* > - * Note: > - * G12A and G12B have different cpu_clks (with > - * different struct clk_hw). We fallback to the global > - * naming string mechanism so cpu_clk_trace_div picks > - * up the appropriate one. > - */ > .name = "cpu_clk", > .index = -1, > }, > > --- > base-commit: 799ce46951dcc75682223cdab12fdc905f2fe735 > change-id: 20241213-amlogic-clk-g12a-cpua-parent-fix-64362495fc9b > > Best regards, Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Applied to clk-meson (clk-meson-next), thanks!
[1/1] clk: amlogic: g12b: fix cluster A parent data
https://github.com/BayLibre/clk-meson/commit/1909d0d351ed
Best regards,
--
Jerome
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index 20be7b037c07535bd2115f6e70404a95a7832756..4e6584377e43fa7c9956017ddfcd3f295fafd686 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -1137,8 +1137,18 @@ static struct clk_regmap g12a_cpu_clk_div16_en = { .hw.init = &(struct clk_init_data) { .name = "cpu_clk_div16_en", .ops = &clk_regmap_gate_ro_ops, - .parent_hws = (const struct clk_hw *[]) { - &g12a_cpu_clk.hw + .parent_data = &(const struct clk_parent_data) { + /* + * Note: + * G12A and G12B have different cpu clocks (with + * different struct clk_hw). We fallback to the global + * naming string mechanism so this clock picks + * up the appropriate one. Same goes for the other + * clock using cpu cluster A clock output and present + * on both G12 variant. + */ + .name = "cpu_clk", + .index = -1, }, .num_parents = 1, /* @@ -1203,7 +1213,10 @@ static struct clk_regmap g12a_cpu_clk_apb_div = { .hw.init = &(struct clk_init_data){ .name = "cpu_clk_apb_div", .ops = &clk_regmap_divider_ro_ops, - .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw }, + .parent_data = &(const struct clk_parent_data) { + .name = "cpu_clk", + .index = -1, + }, .num_parents = 1, }, }; @@ -1237,7 +1250,10 @@ static struct clk_regmap g12a_cpu_clk_atb_div = { .hw.init = &(struct clk_init_data){ .name = "cpu_clk_atb_div", .ops = &clk_regmap_divider_ro_ops, - .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw }, + .parent_data = &(const struct clk_parent_data) { + .name = "cpu_clk", + .index = -1, + }, .num_parents = 1, }, }; @@ -1271,7 +1287,10 @@ static struct clk_regmap g12a_cpu_clk_axi_div = { .hw.init = &(struct clk_init_data){ .name = "cpu_clk_axi_div", .ops = &clk_regmap_divider_ro_ops, - .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw }, + .parent_data = &(const struct clk_parent_data) { + .name = "cpu_clk", + .index = -1, + }, .num_parents = 1, }, }; @@ -1306,13 +1325,6 @@ static struct clk_regmap g12a_cpu_clk_trace_div = { .name = "cpu_clk_trace_div", .ops = &clk_regmap_divider_ro_ops, .parent_data = &(const struct clk_parent_data) { - /* - * Note: - * G12A and G12B have different cpu_clks (with - * different struct clk_hw). We fallback to the global - * naming string mechanism so cpu_clk_trace_div picks - * up the appropriate one. - */ .name = "cpu_clk", .index = -1, },
Several clocks used by both g12a and g12b use the g12a cpu A clock hw pointer as clock parent. This is incorrect on g12b since the parents of cluster A cpu clock are different. Also the hw clock provided as parent to these children is not even registered clock on g12b. Fix the problem by reverting to the global namespace and let CCF pick the appropriate, as it is already done for other clocks, such as cpu_clk_trace_div. Fixes: 25e682a02d91 ("clk: meson: g12a: migrate to the new parent description method") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> --- drivers/clk/meson/g12a.c | 36 ++++++++++++++++++++++++------------ 1 file changed, 24 insertions(+), 12 deletions(-) --- base-commit: 799ce46951dcc75682223cdab12fdc905f2fe735 change-id: 20241213-amlogic-clk-g12a-cpua-parent-fix-64362495fc9b Best regards,