From patchwork Fri Dec 20 07:53:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yicong Yang X-Patchwork-Id: 13916330 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 05EC3E7718A for ; Fri, 20 Dec 2024 07:57:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=T4LukyvjhjnqKCWrkI0XAWl+mJyXoHQsW4/M2kqs+SU=; b=dg22itUC43efccI43qLq1x4mT+ +JYbbOlZ++pgOry8OZ7L1KOaAPJuv4guu7CyE+iq07Ykp/GwSJ64X68INDGYhLqyISPzJhzNJAcaX GI+HEII9YSVo299nDnrBcHOkb9C860L5Qr/3Q/z75Yr5r3dZilIvXv1+wE11NT4nutGqLPHXhThZC Sd7SBheUSOHqQGUUKsoUpRaG8GbLLotPZpmMOlYwIw3BZBl7cyCeT1syeWdaVTlwXrt+rDAiv4vvX LyQnRqCjROH7QhtFt2G6OUulArqpuwe6nAIhBx/4GZpjIB1lrSqaGIDF4Yu9PyX7zSupEfWihj2Jc oDIvalgA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tOXsO-00000004Dgw-3zEa; Fri, 20 Dec 2024 07:56:48 +0000 Received: from szxga03-in.huawei.com ([45.249.212.189]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tOXq8-00000004D8q-04a0 for linux-arm-kernel@lists.infradead.org; Fri, 20 Dec 2024 07:54:30 +0000 Received: from mail.maildlp.com (unknown [172.19.163.48]) by szxga03-in.huawei.com (SkyGuard) with ESMTP id 4YF04n1gZJzRjqn; Fri, 20 Dec 2024 15:52:25 +0800 (CST) Received: from kwepemd200014.china.huawei.com (unknown [7.221.188.8]) by mail.maildlp.com (Postfix) with ESMTPS id DA048180064; Fri, 20 Dec 2024 15:54:19 +0800 (CST) Received: from localhost.localdomain (10.50.165.33) by kwepemd200014.china.huawei.com (7.221.188.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.34; Fri, 20 Dec 2024 15:54:18 +0800 From: Yicong Yang To: , , , , , , , , , , , CC: , , , , , , , , , , , , Subject: [PATCH v10 3/4] arm64: topology: Support SMT control on ACPI based system Date: Fri, 20 Dec 2024 15:53:12 +0800 Message-ID: <20241220075313.51502-4-yangyicong@huawei.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20241220075313.51502-1-yangyicong@huawei.com> References: <20241220075313.51502-1-yangyicong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.50.165.33] X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To kwepemd200014.china.huawei.com (7.221.188.8) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241219_235428_383515_8EB192B7 X-CRM114-Status: GOOD ( 22.56 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Yicong Yang For ACPI we'll build the topology from PPTT and we cannot directly get the SMT number of each core. Instead using a temporary xarray to record the heterogeneous information (from ACPI_PPTT_ACPI_IDENTICAL) and SMT information of the first core in its heterogeneous CPU cluster when building the topology. Then we can know the largest SMT number in the system. If a homogeneous system's using ACPI 6.2 or later, all the CPUs should be under the root node of PPTT. There'll be only one entry in the xarray and all the CPUs in the system will be assumed identical. The core's SMT control provides two interface to the users [1]: 1) enable/disable SMT by writing on/off 2) enable/disable SMT by writing thread number 1/max_thread_number If a system have more than one SMT thread number the 2) may not handle it well, since there're multiple thread numbers in the system and 2) only accept 1/max_thread_number. So issue a warning to notify the users if such system detected. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/ABI/testing/sysfs-devices-system-cpu#n542 Signed-off-by: Yicong Yang --- arch/arm64/kernel/topology.c | 66 ++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c index 1a2c72f3e7f8..85cb18d72a29 100644 --- a/arch/arm64/kernel/topology.c +++ b/arch/arm64/kernel/topology.c @@ -15,8 +15,10 @@ #include #include #include +#include #include #include +#include #include #include @@ -37,17 +39,28 @@ static bool __init acpi_cpu_is_threaded(int cpu) return !!is_threaded; } +struct cpu_smt_info { + int thread_num; + int core_id; +}; + /* * Propagate the topology information of the processor_topology_node tree to the * cpu_topology array. */ int __init parse_acpi_topology(void) { + int max_smt_thread_num = 0; + struct cpu_smt_info *entry; + struct xarray hetero_cpu; + unsigned long hetero_id; int cpu, topology_id; if (acpi_disabled) return 0; + xa_init(&hetero_cpu); + for_each_possible_cpu(cpu) { topology_id = find_acpi_cpu_topology(cpu, 0); if (topology_id < 0) @@ -57,6 +70,32 @@ int __init parse_acpi_topology(void) cpu_topology[cpu].thread_id = topology_id; topology_id = find_acpi_cpu_topology(cpu, 1); cpu_topology[cpu].core_id = topology_id; + + /* + * In the PPTT, CPUs below a node with the 'identical + * implementation' flag have the same number of threads. + * Count the number of threads for only one CPU (i.e. + * one core_id) among those with the same hetero_id. + * See the comment of find_acpi_cpu_topology_hetero_id() + * for more details. + * + * One entry is created for each node having: + * - the 'identical implementation' flag + * - its parent not having the flag + */ + hetero_id = find_acpi_cpu_topology_hetero_id(cpu); + entry = (struct cpu_smt_info *)xa_load(&hetero_cpu, hetero_id); + if (!entry) { + entry = kzalloc(sizeof(*entry), GFP_KERNEL); + WARN_ON(!entry); + + entry->core_id = topology_id; + entry->thread_num = 1; + xa_store(&hetero_cpu, hetero_id, + entry, GFP_KERNEL); + } else if (entry->core_id == topology_id) { + entry->thread_num++; + } } else { cpu_topology[cpu].thread_id = -1; cpu_topology[cpu].core_id = topology_id; @@ -67,6 +106,33 @@ int __init parse_acpi_topology(void) cpu_topology[cpu].package_id = topology_id; } + /* + * This should be a short loop depending on the number of heterogeneous + * CPU clusters. Typically on a homogeneous system there's only one + * entry in the XArray. + */ + xa_for_each(&hetero_cpu, hetero_id, entry) { + if (entry->thread_num != max_smt_thread_num && max_smt_thread_num) + pr_warn_once("Heterogeneous SMT topology is partly supported by SMT control\n"); + + if (entry->thread_num > max_smt_thread_num) + max_smt_thread_num = entry->thread_num; + + xa_erase(&hetero_cpu, hetero_id); + kfree(entry); + } + + /* + * Notify the CPU framework of the SMT support. Initialize the + * max_smt_thread_num to 1 if no SMT support detected. A thread + * number of 1 can be handled by the framework so we don't need + * to check max_smt_thread_num to see we support SMT or not. + */ + if (!max_smt_thread_num) + max_smt_thread_num = 1; + + cpu_smt_set_num_threads(max_smt_thread_num, max_smt_thread_num); + xa_destroy(&hetero_cpu); return 0; } #endif