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[78.11.220.99]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aac0efe46f6sm395237866b.111.2024.12.22.06.52.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Dec 2024 06:52:58 -0800 (PST) From: Krzysztof Kozlowski To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH] arm64: dts: exynos8895: Rename PMU nodes to fixup sorting Date: Sun, 22 Dec 2024 15:52:57 +0100 Message-ID: <20241222145257.31451-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241222_065302_156567_0A1AC632 X-CRM114-Status: GOOD ( 11.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Nodes should be sorted by name but it is also nice to have same class of devices together, so rename both PMU nodes (A53 and M2) to use "pmu" prefix, instead of suffix. Signed-off-by: Krzysztof Kozlowski --- I know we have everywhere else in pure-ARM designs nodes "arm-xxx-pmu", but this is too trivial and unimportant to change. I however want to avoid copying unsorted-style code to new patches. --- arch/arm64/boot/dts/exynos/exynos8895.dtsi | 48 +++++++++++----------- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi index 90b318b2f08a..d31d74cc4580 100644 --- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi @@ -26,30 +26,6 @@ aliases { pinctrl7 = &pinctrl_peric1; }; - arm-a53-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = , - , - , - ; - interrupt-affinity = <&cpu0>, - <&cpu1>, - <&cpu2>, - <&cpu3>; - }; - - mongoose-m2-pmu { - compatible = "samsung,mongoose-pmu"; - interrupts = , - , - , - ; - interrupt-affinity = <&cpu4>, - <&cpu5>, - <&cpu6>, - <&cpu7>; - }; - cpus { #address-cells = <1>; #size-cells = <0>; @@ -149,6 +125,30 @@ oscclk: osc-clock { clock-output-names = "oscclk"; }; + pmu-a53 { + compatible = "arm,cortex-a53-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, + <&cpu1>, + <&cpu2>, + <&cpu3>; + }; + + pmu-mongoose-m2 { + compatible = "samsung,mongoose-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu4>, + <&cpu5>, + <&cpu6>, + <&cpu7>; + }; + psci { compatible = "arm,psci"; method = "smc";