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([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id d9443c01a7336-219dca04c33sm59503685ad.247.2024.12.22.09.53.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Dec 2024 09:53:50 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nick Chan Subject: [PATCH 9/9] arm64: dts: apple: t8015: Add cpufreq nodes Date: Mon, 23 Dec 2024 01:52:09 +0800 Message-ID: <20241222175314.151437-10-towinchenmi@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241222175314.151437-1-towinchenmi@gmail.com> References: <20241222175314.151437-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241222_095351_476251_668C8D89 X-CRM114-Status: GOOD ( 10.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add cpufreq nodes for Apple A11 SoC. Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/t8015.dtsi | 123 +++++++++++++++++++++++++++ 1 file changed, 123 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t8015.dtsi b/arch/arm64/boot/dts/apple/t8015.dtsi index 8828d830e5be..f93ce2c8b251 100644 --- a/arch/arm64/boot/dts/apple/t8015.dtsi +++ b/arch/arm64/boot/dts/apple/t8015.dtsi @@ -58,6 +58,9 @@ cpu_e0: cpu@0 { compatible = "apple,mistral"; reg = <0x0 0x0>; cpu-release-addr = <0 0>; /* To be filled by loader */ + performance-domains = <&cpufreq_e>; + operating-points-v2 = <&mistral_opp>; + capacity-dmips-mhz = <633>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -66,6 +69,9 @@ cpu_e1: cpu@1 { compatible = "apple,mistral"; reg = <0x0 0x1>; cpu-release-addr = <0 0>; /* To be filled by loader */ + performance-domains = <&cpufreq_e>; + operating-points-v2 = <&mistral_opp>; + capacity-dmips-mhz = <633>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -74,6 +80,9 @@ cpu_e2: cpu@2 { compatible = "apple,mistral"; reg = <0x0 0x2>; cpu-release-addr = <0 0>; /* To be filled by loader */ + performance-domains = <&cpufreq_e>; + operating-points-v2 = <&mistral_opp>; + capacity-dmips-mhz = <633>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -82,6 +91,9 @@ cpu_e3: cpu@3 { compatible = "apple,mistral"; reg = <0x0 0x3>; cpu-release-addr = <0 0>; /* To be filled by loader */ + performance-domains = <&cpufreq_e>; + operating-points-v2 = <&mistral_opp>; + capacity-dmips-mhz = <633>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -90,6 +102,9 @@ cpu_p0: cpu@10004 { compatible = "apple,monsoon"; reg = <0x0 0x10004>; cpu-release-addr = <0 0>; /* To be filled by loader */ + performance-domains = <&cpufreq_p>; + operating-points-v2 = <&monsoon_opp>; + capacity-dmips-mhz = <1024>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -98,11 +113,107 @@ cpu_p1: cpu@10005 { compatible = "apple,monsoon"; reg = <0x0 0x10005>; cpu-release-addr = <0 0>; /* To be filled by loader */ + performance-domains = <&cpufreq_p>; + operating-points-v2 = <&monsoon_opp>; + capacity-dmips-mhz = <1024>; enable-method = "spin-table"; device_type = "cpu"; }; }; + mistral_opp: opp-table-0 { + compatible = "operating-points-v2"; + + opp01 { + opp-hz = /bits/ 64 <300000000>; + opp-level = <1>; + clock-latency-ns = <1800>; + }; + opp02 { + opp-hz = /bits/ 64 <453000000>; + opp-level = <2>; + clock-latency-ns = <140000>; + }; + opp03 { + opp-hz = /bits/ 64 <672000000>; + opp-level = <3>; + clock-latency-ns = <105000>; + }; + opp04 { + opp-hz = /bits/ 64 <972000000>; + opp-level = <4>; + clock-latency-ns = <115000>; + }; + opp05 { + opp-hz = /bits/ 64 <1272000000>; + opp-level = <5>; + clock-latency-ns = <125000>; + }; + opp06 { + opp-hz = /bits/ 64 <1572000000>; + opp-level = <6>; + clock-latency-ns = <135000>; + }; +#if 0 + /* Not available until CPU deep sleep is implemented */ + opp07 { + opp-hz = /bits/ 64 <1680000000>; + opp-level = <7>; + clock-latency-ns = <135000>; + turbo-mode; + }; +#endif + }; + + monsoon_opp: opp-table-1 { + compatible = "operating-points-v2"; + + opp01 { + opp-hz = /bits/ 64 <300000000>; + opp-level = <1>; + clock-latency-ns = <1400>; + }; + opp02 { + opp-hz = /bits/ 64 <453000000>; + opp-level = <2>; + clock-latency-ns = <140000>; + }; + opp03 { + opp-hz = /bits/ 64 <853000000>; + opp-level = <3>; + clock-latency-ns = <110000>; + }; + opp04 { + opp-hz = /bits/ 64 <1332000000>; + opp-level = <4>; + clock-latency-ns = <110000>; + }; + opp05 { + opp-hz = /bits/ 64 <1812000000>; + opp-level = <5>; + clock-latency-ns = <125000>; + }; + opp06 { + opp-hz = /bits/ 64 <2064000000>; + opp-level = <6>; + clock-latency-ns = <130000>; + }; + opp07 { + opp-hz = /bits/ 64 <2304000000>; + opp-level = <7>; + clock-latency-ns = <140000>; + }; +#if 0 + /* Not available until CPU deep sleep is implemented */ + opp08 { + opp-hz = /bits/ 64 <2376000000>; + opp-level = <8>; + clock-latency-ns = <140000>; + turbo-mode; + }; +#endif + }; + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -110,6 +221,18 @@ soc { nonposted-mmio; ranges; + cpufreq_e: performance-controller@208e20000 { + compatible = "apple,t8015-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq"; + reg = <0x2 0x08e20000 0 0x1000>; + #performance-domain-cells = <0>; + }; + + cpufreq_p: performance-controller@208ea0000 { + compatible = "apple,t8015-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq"; + reg = <0x2 0x08ea0000 0 0x1000>; + #performance-domain-cells = <0>; + }; + serial0: serial@22e600000 { compatible = "apple,s5l-uart"; reg = <0x2 0x2e600000 0x0 0x4000>;