| Message ID | 20241226063313.3267515-3-damon.ding@rock-chips.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add eDP support for RK3588 | expand |
diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml index 60dedf9b2be7..200703905b29 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml @@ -15,6 +15,7 @@ properties: enum: - rockchip,rk3288-dp - rockchip,rk3399-edp + - rockchip,rk3588-edp clocks: minItems: 2 @@ -31,10 +32,14 @@ properties: maxItems: 1 resets: - maxItems: 1 + minItems: 1 + maxItems: 2 reset-names: - const: dp + minItems: 1 + items: + - const: dp + - const: apb rockchip,grf: $ref: /schemas/types.yaml#/definitions/phandle
Compared with RK3288/RK3399, the HBR2 link rate support is the main improvement of RK3588 eDP TX controller, and there are also two independent eDP display interfaces on RK3588 Soc. The newly added 'apb' reset is to ensure the APB bus of eDP controller works well on the RK3588 SoC. Signed-off-by: Damon Ding <damon.ding@rock-chips.com> --- Changes in v2: - Add the main defferences of the RK3588 eDP and the previous versions in commit message Changes in v3: - Expand the property clock-names, resets and reset-names Changes in v4: - Remove 'spdif' clock which added in v3 - Add the comment of newly added 'apb' reset in commit message --- .../bindings/display/rockchip/rockchip,analogix-dp.yaml | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)