@@ -31,6 +31,7 @@ properties:
compatible:
enum:
- samsung,exynos990-cmu-hsi0
+ - samsung,exynos990-cmu-peris
- samsung,exynos990-cmu-top
clocks:
@@ -79,6 +80,24 @@ allOf:
- const: usbdp_debug
- const: dpgtc
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: samsung,exynos990-cmu-peris
+
+ then:
+ properties:
+ clocks:
+ items:
+ - description: External reference clock (26 MHz)
+ - description: CMU_PERIS BUS clock (from CMU_TOP)
+
+ clock-names:
+ items:
+ - const: oscclk
+ - const: bus
+
- if:
properties:
compatible:
@@ -233,4 +233,25 @@
#define CLK_GOUT_HSI0_CMU_HSI0_PCLK 21
#define CLK_GOUT_HSI0_XIU_D_HSI0_ACLK 22
+/* CMU_PERIS */
+#define CLK_MOUT_PERIS_BUS_USER 1
+#define CLK_MOUT_PERIS_CLK_PERIS_GIC 2
+#define CLK_GOUT_PERIS_SYSREG_PERIS_PCLK 3
+#define CLK_GOUT_PERIS_WDT_CLUSTER2_PCLK 4
+#define CLK_GOUT_PERIS_WDT_CLUSTER0_PCLK 5
+#define CLK_CLK_PERIS_PERIS_CMU_PERIS_PCLK 6
+#define CLK_GOUT_PERIS_CLK_PERIS_BUSP_CLK 7
+#define CLK_GOUT_PERIS_CLK_PERIS_OSCCLK_CLK 8
+#define CLK_GOUT_PERIS_CLK_PERIS_GIC_CLK 9
+#define CLK_GOUT_PERIS_AD_AXI_P_PERIS_ACLKM 10
+#define CLK_GOUT_PERIS_OTP_CON_BIRA_PCLK 11
+#define CLK_GOUT_PERIS_GIC_CLK 12
+#define CLK_GOUT_PERIS_LHM_AXI_P_PERIS_CLK 13
+#define CLK_GOUT_PERIS_MCT_PCLK 14
+#define CLK_GOUT_PERIS_OTP_CON_TOP_PCLK 15
+#define CLK_GOUT_PERIS_D_TZPC_PERIS_PCLK 16
+#define CLK_GOUT_PERIS_TMU_TOP_PCLK 17
+#define CLK_GOUT_PERIS_OTP_CON_BIRA_OSCCLK 18
+#define CLK_GOUT_PERIS_OTP_CON_TOP_OSCCLK 19
+
#endif
Add CMU_PERIS block compatible, and clock definitions. CMU_PERIS requires one bus clock dependency, and it's used for i.e the MCT. Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org> --- .../bindings/clock/samsung,exynos990-clock.yaml | 19 +++++++++++++++++++ include/dt-bindings/clock/samsung,exynos990.h | 21 +++++++++++++++++++++ 2 files changed, 40 insertions(+)