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[95.246.253.26]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-4366128a62asm536258685e9.44.2025.01.05.07.03.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Jan 2025 07:03:58 -0800 (PST) From: Christian Marangi To: Matthias Brugger , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Christian Marangi , Daniel Danzberger , Lorenzo Bianconi , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, upstream@airoha.com Subject: [PATCH 1/3] arm64: dts: airoha: en7581: Add Clock Controller node Date: Sun, 5 Jan 2025 16:03:02 +0100 Message-ID: <20250105150328.15172-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.45.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250105_070401_577004_1B01D9B0 X-CRM114-Status: GOOD ( 10.44 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add Clock Controller node for EN7581 SoC to correctly expose supported clock for any user in the SoC. Signed-off-by: Christian Marangi --- arch/arm64/boot/dts/airoha/en7581.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/airoha/en7581.dtsi b/arch/arm64/boot/dts/airoha/en7581.dtsi index 55eb1762fb11..f584409e72cd 100644 --- a/arch/arm64/boot/dts/airoha/en7581.dtsi +++ b/arch/arm64/boot/dts/airoha/en7581.dtsi @@ -2,6 +2,7 @@ #include #include +#include / { interrupt-parent = <&gic>; @@ -142,6 +143,13 @@ gic: interrupt-controller@9000000 { interrupts = ; }; + scuclk: clock-controller@1fa20000 { + compatible = "airoha,en7581-scu"; + reg = <0x0 0x1fb00000 0x0 0x970>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + uart1: serial@1fbf0000 { compatible = "ns16550"; reg = <0x0 0x1fbf0000 0x0 0x30>;