From patchwork Tue Jan 7 07:49:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kever Yang X-Patchwork-Id: 13928332 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 49DC9E77197 for ; Tue, 7 Jan 2025 07:55:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=g0EkZFypRAuFjGmD0cpX0E7wOFkSXom4w3Ap9DoRno8=; b=B0qxVEKuSyZ8Fzz1zhibkphRZy 19R5lGaOQCqbP9PkMgV6+buPD+FfHlEGMvzTm117xrXx8gx3iqvN3Kxw/USD8e6eXOIhtpMPJp5lk KFQApEUg7jpl+Bot0gtCS8Q5wpGcnuDCaSH+Jm2mGGBX4LBQB4ynNNkMiX08clIivmpd9Y/dVb1Gc yJsR7dlpTQuisZB2HZYrl0yxFC9APb0VEdEwgDl2t8h3tY3sxU9tANFOJgT2S8sZE7glStuez//ac 9DtEjLIf6EHf9I4f+3dPfEOXHK9rcRiSZEwOwpVijdTYZDnEqaB2o6KY1nWcQ/TBkb2wfSxTapqOi 0+Jy/ghw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tV4RD-00000003oqG-2pIn; Tue, 07 Jan 2025 07:55:43 +0000 Received: from mail-m49230.qiye.163.com ([45.254.49.230]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tV4L3-00000003nkr-3x7J; Tue, 07 Jan 2025 07:49:28 +0000 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 7f3b5a82; Tue, 7 Jan 2025 15:49:18 +0800 (GMT+08:00) From: Kever Yang To: heiko@sntech.de Cc: linux-rockchip@lists.infradead.org, Kever Yang , devicetree@vger.kernel.org, Conor Dooley , Frank Wang , Rob Herring , Detlev Casanova , linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Yifeng Zhao , linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 3/7] arm64: dts: rockchip: Add rk3576 pcie nodes Date: Tue, 7 Jan 2025 15:49:07 +0800 Message-Id: <20250107074911.550057-4-kever.yang@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250107074911.550057-1-kever.yang@rock-chips.com> References: <20250107074911.550057-1-kever.yang@rock-chips.com> MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGUseS1ZISh1CH0JPSRhMHRpWFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSUhCSE NVSktLVUpCS0tZBg++ X-HM-Tid: 0a943fbd4e3e03afkunm7f3b5a82 X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6NCI6Njo5NDIUNRMDFC8QSE4p PysKCxhVSlVKTEhNSUhNSk5CTE5OVTMWGhIXVRAeDR4JVQIaFRw7CRQYEFYYExILCFUYFBZFWVdZ EgtZQVlOQ1VJSVVMVUpKT1lXWQgBWUFPQ0JJNwY+ DKIM-Signature: a=rsa-sha256; b=AN+0coXPQCMvjo6nqPVJvY9tch6IlU1vE11PtoH6CGdD/RyXAhCf3SAg4Er5Ia+Gbkik+c9/DpM1iVrxk7oJWi/ZCX1+JoM8yVLMpD12cotqbbO0xeln/8AWuYrLb+BKhedaOcUJiUKdIwbWffHBAPdaOgj8tHlAy7PFdNrJbl4=; s=default; c=relaxed/relaxed; d=rock-chips.com; v=1; bh=g0EkZFypRAuFjGmD0cpX0E7wOFkSXom4w3Ap9DoRno8=; h=date:mime-version:subject:message-id:from; X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250106_234922_168144_C1C05BF4 X-CRM114-Status: UNSURE ( 8.06 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org rk3576 has two pcie controllers, both are pcie2x1 work with naneng-combphy. Signed-off-by: Kever Yang --- Changes in v4: None Changes in v3: - Update the subject Changes in v2: - Update clock and reset names and sequence to pass DTB check arch/arm64/boot/dts/rockchip/rk3576.dtsi | 109 +++++++++++++++++++++++ 1 file changed, 109 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi index a147879da501..0486525fe596 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -1016,6 +1016,115 @@ qos_npu_m1ro: qos@27f22100 { reg = <0x0 0x27f22100 0x0 0x20>; }; + pcie0: pcie@2a200000 { + compatible = "rockchip,rk3576-pcie", "rockchip,rk3568-pcie"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x0 0xf>; + clocks = <&cru ACLK_PCIE0_MST>, <&cru ACLK_PCIE0_SLV>, + <&cru ACLK_PCIE0_DBI>, <&cru PCLK_PCIE0>, + <&cru CLK_PCIE0_AUX>; + + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux"; + device_type = "pci"; + interrupts = , + , + , + , + , + ; + interrupt-names = "sys", "pmc", "msg", "legacy", "err", "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie0_intc 0>, + <0 0 0 2 &pcie0_intc 1>, + <0 0 0 3 &pcie0_intc 2>, + <0 0 0 4 &pcie0_intc 3>; + linux,pci-domain = <0>; + num-ib-windows = <8>; + num-viewport = <8>; + num-ob-windows = <2>; + max-link-speed = <2>; + num-lanes = <1>; + phys = <&combphy0_ps PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + power-domains = <&power RK3576_PD_PHP>; + ranges = <0x01000000 0x0 0x20100000 0x0 0x20100000 0x0 0x00100000 + 0x02000000 0x0 0x20200000 0x0 0x20200000 0x0 0x00e00000 + 0x03000000 0x9 0x00000000 0x9 0x00000000 0x0 0x80000000>; + reg = <0x0 0x22000000 0x0 0x00400000>, + <0x0 0x2a200000 0x0 0x00010000>, + <0x0 0x20000000 0x0 0x00100000>; + reg-names = "dbi", "apb", "config"; + resets = <&cru SRST_PCIE0_POWER_UP>, <&cru SRST_P_PCIE0>; + reset-names = "pwr", "pipe"; + status = "disabled"; + + pcie0_intc: legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = ; + }; + }; + + pcie1: pcie@2a210000 { + compatible = "rockchip,rk3576-pcie", "rockchip,rk3568-pcie"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x20 0x2f>; + clocks = <&cru ACLK_PCIE1_MST>, <&cru ACLK_PCIE1_SLV>, + <&cru ACLK_PCIE1_DBI>, <&cru PCLK_PCIE1>, + <&cru CLK_PCIE1_AUX>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux"; + device_type = "pci"; + interrupts = , + , + , + , + , + ; + interrupt-names = "sys", "pmc", "msg", "legacy", "err", "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie1_intc 0>, + <0 0 0 2 &pcie1_intc 1>, + <0 0 0 3 &pcie1_intc 2>, + <0 0 0 4 &pcie1_intc 3>; + linux,pci-domain = <0>; + num-ib-windows = <8>; + num-viewport = <8>; + num-ob-windows = <2>; + max-link-speed = <2>; + num-lanes = <1>; + phys = <&combphy1_psu PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + power-domains = <&power RK3576_PD_SUBPHP>; + ranges = <0x01000000 0x0 0x21100000 0x0 0x21100000 0x0 0x00100000 + 0x02000000 0x0 0x21200000 0x0 0x21200000 0x0 0x00e00000 + 0x03000000 0x9 0x80000000 0x9 0x80000000 0x0 0x80000000>; + reg = <0x0 0x22400000 0x0 0x00400000>, + <0x0 0x2a210000 0x0 0x00010000>, + <0x0 0x21000000 0x0 0x00100000>; + reg-names = "dbi", "apb", "config"; + resets = <&cru SRST_PCIE1_POWER_UP>, <&cru SRST_P_PCIE1>; + reset-names = "pwr", "pipe"; + status = "disabled"; + + pcie1_intc: legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = ; + }; + }; + gmac0: ethernet@2a220000 { compatible = "rockchip,rk3576-gmac", "snps,dwmac-4.20a"; reg = <0x0 0x2a220000 0x0 0x10000>;