@@ -56,6 +56,26 @@ properties:
Phandle to system configuration controller. It can be used to control the
power domain circuitry.
+ st,ssc-modfreq-hz:
+ description:
+ The modulation frequency for main PLL (in Hz)
+
+ st,ssc-moddepth-permyriad:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ The modulation rate for main PLL (in permyriad, i.e. 0.01%)
+ minimum: 25
+ maximum: 200
+
+ st,ssc-modmethod:
+ $ref: /schemas/types.yaml#/definitions/string
+ description:
+ The modulation techniques for main PLL.
+ items:
+ enum:
+ - center-spread
+ - down-spread
+
required:
- compatible
- reg
@@ -81,6 +101,10 @@ allOf:
- description: high speed external (HSE) clock input
- description: low speed external (LSE) clock input
- description: Inter-IC sound (I2S) clock input
+ st,ssc-modfreq-hz: false
+ st,ssc-moddepth-permyriad: false
+ st,ssc-modmethod: false
+
else:
properties:
'#clock-cells':
@@ -98,6 +122,18 @@ additionalProperties: false
examples:
# Reset and Clock Control Module node:
+ - |
+ clock-controller@40023800 {
+ compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
+ reg = <0x40023800 0x400>;
+ #clock-cells = <2>;
+ #reset-cells = <1>;
+ clocks = <&clk_hse>, <&clk_i2s_ckin>;
+ st,syscfg = <&pwrcfg>;
+ st,ssc-modfreq-hz = <10000>;
+ st,ssc-moddepth-permyriad = <200>;
+ st,ssc-modmethod = "center-spread";
+ };
- |
clock-controller@58024400 {
compatible = "st,stm32h743-rcc", "st,stm32-rcc";
The addition of DT bindings for enabling and tuning spread spectrum clocking generation is available only for the main PLL of stm32f{4,7} platforms. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> --- Changes in v2: - Update the commit message - Change st,ssc-modmethod type from non-unique-string-array to string .../bindings/clock/st,stm32-rcc.yaml | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+)